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📄 recive.bdf

📁 使用verilog语言控制CPLD通过红外收发器进行红外通讯
💻 BDF
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
//#pragma file_not_in_maxplusii_format
(header "graphic" (version "1.3"))
(pin
	(input)
	(rect 48 160 216 176)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "irin" (rect 5 0 19 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 92 12)(pt 117 12)(line_width 1))
		(line (pt 92 4)(pt 117 4)(line_width 1))
		(line (pt 121 8)(pt 168 8)(line_width 1))
		(line (pt 92 12)(pt 92 4)(line_width 1))
		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
	)
	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
	(annotation_block (location)(rect 0 176 48 192))
)
(pin
	(input)
	(rect 80 288 248 304)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "inir2" (rect 5 0 25 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 92 12)(pt 117 12)(line_width 1))
		(line (pt 92 4)(pt 117 4)(line_width 1))
		(line (pt 121 8)(pt 168 8)(line_width 1))
		(line (pt 92 12)(pt 92 4)(line_width 1))
		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
	)
	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
	(output)
	(rect 320 160 496 176)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "led" (rect 90 0 104 12)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8)(line_width 1))
		(line (pt 52 4)(pt 78 4)(line_width 1))
		(line (pt 52 12)(pt 78 12)(line_width 1))
		(line (pt 52 12)(pt 52 4)(line_width 1))
		(line (pt 78 4)(pt 82 8)(line_width 1))
		(line (pt 82 8)(pt 78 12)(line_width 1))
		(line (pt 78 12)(pt 82 8)(line_width 1))
	)
	(annotation_block (location)(rect 496 176 544 192))
)
(pin
	(output)
	(rect 352 288 528 304)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "led2" (rect 90 0 110 12)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8)(line_width 1))
		(line (pt 52 4)(pt 78 4)(line_width 1))
		(line (pt 52 12)(pt 78 12)(line_width 1))
		(line (pt 52 12)(pt 52 4)(line_width 1))
		(line (pt 78 4)(pt 82 8)(line_width 1))
		(line (pt 82 8)(pt 78 12)(line_width 1))
		(line (pt 78 12)(pt 82 8)(line_width 1))
	)
)
(connector
	(pt 216 168)
	(pt 320 168)
)
(connector
	(pt 248 296)
	(pt 352 296)
)

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