📄 recive.fit.rpt
字号:
+----------------------------+
; Advanced Data - General ;
+--------------------+-------+
; Name ; Value ;
+--------------------+-------+
; Status Code ; 0 ;
; Desired User Slack ; 0 ;
; Fit Attempts ; 1 ;
+--------------------+-------+
+-----------------------------------------------------------------------------------------+
; Advanced Data - Placement Preparation ;
+--------------------------------------------------------------------------------+--------+
; Name ; Value ;
+--------------------------------------------------------------------------------+--------+
; Auto Fit Point 1 - Fit Attempt 1 ; ff ;
; Mid Wire Use - Fit Attempt 1 ; 0 ;
; Mid Slack - Fit Attempt 1 ; -7137 ;
; Internal Atom Count - Fit Attempt 1 ; 0 ;
; LE/ALM Count - Fit Attempt 1 ; 0 ;
; LAB Count - Fit Attempt 1 ; 0 ;
; Outputs per Lab - Fit Attempt 1 ; -1.#IO ;
; Inputs per LAB - Fit Attempt 1 ; -1.#IO ;
; Global Inputs per LAB - Fit Attempt 1 ; -1.#IO ;
; LAB Constraint 'non-global clock / CE pair + async load' - Fit Attempt 1 ; ;
; LAB Constraint 'ce + sync load' - Fit Attempt 1 ; ;
; LAB Constraint 'non-global controls' - Fit Attempt 1 ; ;
; LAB Constraint 'un-route combination' - Fit Attempt 1 ; ;
; LAB Constraint 'non-global with asyn_clear' - Fit Attempt 1 ; ;
; LAB Constraint 'un-route with async_clear' - Fit Attempt 1 ; ;
; LAB Constraint 'non-global async clear + sync clear' - Fit Attempt 1 ; ;
; LAB Constraint 'global non-clock/non-asynch_clear' - Fit Attempt 1 ; ;
; LAB Constraint 'ygr_cl_ngclk_gclkce_sload_aload_constraint' - Fit Attempt 1 ; ;
; LAB Constraint 'global control signals' - Fit Attempt 1 ; ;
; LAB Constraint 'clock / ce pair constraint' - Fit Attempt 1 ; ;
; LAB Constraint 'aload_aclr pair with aload used' - Fit Attempt 1 ; ;
; LAB Constraint 'aload_aclr pair' - Fit Attempt 1 ; ;
; LAB Constraint 'sload_sclear pair' - Fit Attempt 1 ; ;
; LAB Constraint 'invert_a constraint' - Fit Attempt 1 ; ;
; LAB Constraint 'has placement constraint' - Fit Attempt 1 ; ;
; LAB Constraint 'use of ADATA or SDATA by registers constraint' - Fit Attempt 1 ; ;
; LEs in Chains - Fit Attempt 1 ; 0 ;
; LEs in Long Chains - Fit Attempt 1 ; 0 ;
; LABs with Chains - Fit Attempt 1 ; 0 ;
; LABs with Multiple Chains - Fit Attempt 1 ; 0 ;
; Time - Fit Attempt 1 ; 0 ;
; Time in tsm_tan.dll - Fit Attempt 1 ; 0.010 ;
+--------------------------------------------------------------------------------+--------+
+--------------------------------------------+
; Advanced Data - Placement ;
+------------------------------------+-------+
; Name ; Value ;
+------------------------------------+-------+
; Late Wire Use - Fit Attempt 1 ; 0 ;
; Late Slack - Fit Attempt 1 ; -7137 ;
; Peak Regional Wire - Fit Attempt 1 ; 0.000 ;
; Auto Fit Point 6 - Fit Attempt 1 ; ff ;
; Time - Fit Attempt 1 ; 0 ;
+------------------------------------+-------+
+---------------------------------------------+
; Advanced Data - Routing ;
+-------------------------------------+-------+
; Name ; Value ;
+-------------------------------------+-------+
; Early Wire Use - Fit Attempt 1 ; 0 ;
; Peak Regional Wire - Fit Attempt 1 ; 0 ;
; Early Slack - Fit Attempt 1 ; -6096 ;
; Mid Slack - Fit Attempt 1 ; -6096 ;
; Late Slack - Fit Attempt 1 ; -6096 ;
; Late Wire Use - Fit Attempt 1 ; 0 ;
; Time - Fit Attempt 1 ; 0 ;
; Time in tsm_tan.dll - Fit Attempt 1 ; 0.010 ;
+-------------------------------------+-------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
Info: Processing started: Mon Sep 01 20:56:32 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off recive -c recive
Info: Selected device EPM1270T144C5 for design "recive"
Warning: The high junction temperature operating condition is not set. Assuming a default value of '85'.
Warning: The low junction temperature operating condition is not set. Assuming a default value of '0'.
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
Info: Device EPM570T144C5 is compatible
Info: Device EPM570T144I5 is compatible
Info: Device EPM1270T144I5 is compatible
Info: Fitter is using the Classic Timing Analyzer
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
Info: Assuming a global fmax requirement of 1000 MHz
Info: Assuming a global tsu requirement of 2.0 ns
Info: Assuming a global tco requirement of 1.0 ns
Info: Assuming a global tpd requirement of 1.0 ns
Info: Completed User Assigned Global Signals Promotion Operation
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished register packing: elapsed time is 00:00:00
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Estimated most critical path is pin to pin delay of 6.573 ns
Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_107; Fanout = 1; PIN Node = 'inir2'
Info: 2: + IC(3.119 ns) + CELL(2.322 ns) = 6.573 ns; Loc. = PIN_122; Fanout = 0; PIN Node = 'led2'
Info: Total cell delay = 3.454 ns ( 52.55 % )
Info: Total interconnect delay = 3.119 ns ( 47.45 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources
Info: Peak interconnect usage is 0% of the available device resources in the region that extends from location X9_Y0 to location X17_Y11
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time.
Info: Optimizations that may affect the design's routability were skipped
Info: Optimizations that may affect the design's timing were skipped
Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'.
Info: Generated suppressed messages file C:/Documents and Settings/Administrator/桌面/simple/recive/recive.fit.smsg
Info: Quartus II Fitter was successful. 0 errors, 3 warnings
Info: Allocated 166 megabytes of memory during processing
Info: Processing ended: Mon Sep 01 20:56:36 2008
Info: Elapsed time: 00:00:04
+----------------------------+
; Fitter Suppressed Messages ;
+----------------------------+
The suppressed messages can be found in C:/Documents and Settings/Administrator/桌面/simple/recive/recive.fit.smsg.
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -