pilchard.v

基于SDRAM总线的加速部件核心和相关论文说明

module pilchard(
        PADS_exchecker_reset,
	PADS_dimm_ck        ,
	PADS_dimm_cke       ,
	PADS_dimm_ras       ,
	PADS_dimm_cas       ,
	PADS_dimm_we        ,
	PADS_dimm_s         ,
	PADS_dimm_a         ,
	PADS_dimm_ba        ,
	PADS_dimm_rege      ,
	PADS_dimm_d         ,
	PADS_dimm_cb        ,
	PADS_dimm_dqmb      ,
	PADS_dimm_scl       ,
	PADS_dimm_sda       ,
	PADS_dimm_sa        ,
	PADS_dimm_wp        ,
	PADS_io_conn        
                );
                
                
input             PADS_exchecker_reset;
input             PADS_dimm_ck        ;
input [ 1: 0]     PADS_dimm_cke       ;
input             PADS_dimm_ras       ;
input             PADS_dimm_cas       ;
input             PADS_dimm_we        ;
input [ 3: 0]     PADS_dimm_s         ;
input [13: 0]     PADS_dimm_a         ;
input [ 1: 0]     PADS_dimm_ba        ;
input             PADS_dimm_rege      ;
inout [63: 0]     PADS_dimm_d         ;
inout [ 7: 0]     PADS_dimm_cb        ;
input [ 7: 0]     PADS_dimm_dqmb      ;
input             PADS_dimm_scl       ;
inout             PADS_dimm_sda       ;
input [ 2: 0]     PADS_dimm_sa        ;
input             PADS_dimm_wp        ;
inout [27: 0]     PADS_io_conn        ;
  
  
wire 	                GND             ;
wire                    VDD             ;
wire                    CLK             ;              
wire                    CLKDIV          ;         
wire                    RESET           ;       
wire                    READ            ;      
wire                    WRITE           ;       
wire                    READ_p          ;         
wire                    WRITE_p         ;         
wire                    READ_n          ;
wire                    READ_buf        ;      
wire                    WRITE_buf       ;      
wire                    READ_d          ;   
wire                    WRITE_d         ;    
wire                    READ_d_n        ;          
wire                    READ_d_n_buf    ;          
 
wire     [13:0]         pcore_addr_raw  ;
wire     [13:0]         pcore_addr      ;
wire     [63:0]         pcore_din       ;
wire     [63:0]         pcore_dout      ;
wire     [63:0]         pcore_dmask     ;
wire     [25:0]         pcore_extin     ;
wire     [25:0]         pcore_extout    ;
wire     [25:0]         pcore_extctrl   ;
wire     [ 7:0]         pcore_dqmb      ;


assign GND = 0;
assign VDD = 1;

U_ck_bufg: IBUFG port   (                      
	 PADS_dimm_ck,                       
	 dimm_ck_bufg );                     
                                                 
U_reset_ibuf: IBUF port   (                    
	 PADS_exchecker_reset,               
	 RESET );                            
                                                 
U_clkdllhf: CLKDLLHF port   (                  
	dimm_ck_bufg,                   
       CLK,                            
	 RESET,                            
	 clkdllhf_clk0,                   
	 open,                          
	 clkdllhf_clkdiv,                
	  open );                        
                                           
U_clkdllhf_clk0_bufg: BUFG port  (            
	 clkdllhf_clk0,                      
	 CLK );                              
                                                 
U_clkdllhf_clkdiv_bufg: BUFG port (           
	 clkdllhf_clkdiv,                    
	 CLKDIV );                           
                                                 
U_startup: STARTUP_VIRTEX port (              
	 RESET,                            
	 GND,                              
	 CLK );                            
                                                 
U_dimm_s_ibuf: IBUF port (                    
	 PADS_dimm_s[0],                     
	 dimm_s_ibuf );                      
                                                 
U_dimm_ras_ibuf: IBUF port (                  
	 PADS_dimm_ras,                      
	 dimm_ras_ibuf );                    
                                                 
U_dimm_cas_ibuf: IBUF port (               
	 PADS_dimm_cas,                                                      
	 dimm_cas_ibuf );                   
                                                 
U_dimm_we_ibuf: IBUF port (                   
	 PADS_dimm_we,                       
	 dimm_we_ibuf );