top.vif

ps2 keyboard controller

#
# Synplicity Verification Interface File
# Generated using Synplify-pro
#
# Copyright (c) 1996-2005 Synplicity, Inc.
# All rights reserved
#

# Set logfile options
vif_set_result_file  top.vlf

# Set technology for TCL script
vif_set_technology -architecture FPGA -vendor Altera

# RTL and technology files
vif_add_library -original $env(QUARTUS_ROOTDIR)/eda/fv_lib/verilog
vif_add_file -original -verilog ../../hdl/serial.v
vif_add_file -original -verilog ../../hdl/lcd_test_pongball.v
vif_add_file -original -verilog ../../hdl/ps2.v
vif_add_file -original -verilog ../../hdl/top.v
vif_set_top_module -original -top top
 
vif_add_library -translated $env(QUARTUS_ROOTDIR)/eda/fv_lib/verilog
vif_add_file -translated -verilog top.vqm
vif_set_top_module -translated -top top 
# Read FSM encoding
vif_set_fsm -fsm fsm_0
vif_set_fsmreg -original -fsm fsm_0 ps2_block/m1_state[3:0]
vif_set_fsmreg -translated -fsm  fsm_0 ps2_block/m1_state[13:0]
vif_set_state_map -fsm fsm_0 -original "0000" -translated "00000000000001"
vif_set_state_map -fsm fsm_0 -original "0001" -translated "00000000000010"
vif_set_state_map -fsm fsm_0 -original "0010" -translated "00000000000100"
vif_set_state_map -fsm fsm_0 -original "0011" -translated "00000000001000"
vif_set_state_map -fsm fsm_0 -original "0100" -translated "00000000010000"
vif_set_state_map -fsm fsm_0 -original "0101" -translated "00000000100000"
vif_set_state_map -fsm fsm_0 -original "0110" -translated "00000001000000"
vif_set_state_map -fsm fsm_0 -original "0111" -translated "00000010000000"
vif_set_state_map -fsm fsm_0 -original "1000" -translated "00000100000000"
vif_set_state_map -fsm fsm_0 -original "1001" -translated "00001000000000"
vif_set_state_map -fsm fsm_0 -original "1010" -translated "00010000000000"
vif_set_state_map -fsm fsm_0 -original "1100" -translated "00100000000000"
vif_set_state_map -fsm fsm_0 -original "1101" -translated "01000000000000"
vif_set_state_map -fsm fsm_0 -original "1110" -translated "10000000000000"
vif_set_fsm -fsm fsm_15
vif_set_fsmreg -original -fsm fsm_15 rs232_tx_block/m1_state[1:0]
vif_set_fsmreg -translated -fsm  fsm_15 rs232_tx_block/m1_state[1:0]
vif_set_state_map -fsm fsm_15 -original "00" -translated "00"
vif_set_state_map -fsm fsm_15 -original "01" -translated "01"
vif_set_state_map -fsm fsm_15 -original "10" -translated "10"
vif_set_state_map -fsm fsm_15 -original "11" -translated "11"
vif_set_fsm -fsm fsm_18
vif_set_fsmreg -original -fsm fsm_18 rs232_rx_block/m1_state[2:0]
vif_set_fsmreg -translated -fsm  fsm_18 rs232_rx_block/m1_state[5:0]
vif_set_state_map -fsm fsm_18 -original "000" -translated "000001"
vif_set_state_map -fsm fsm_18 -original "001" -translated "000010"
vif_set_state_map -fsm fsm_18 -original "010" -translated "000100"
vif_set_state_map -fsm fsm_18 -original "011" -translated "001000"
vif_set_state_map -fsm fsm_18 -original "100" -translated "010000"
vif_set_state_map -fsm fsm_18 -original "101" -translated "100000"

# Memory map points

# SRL map points

# Compiler constant registers

# Compiler constant latches

# Compiler RTL sequential redundancies

# RTL sequential redundancies

# Technology sequential redundancies

# Inversion map points
vif_set_map_point -register -inverted -original ps2_block/m1_state[0] -translated ps2_block/m1_state_i_0__Z
vif_set_map_point -register -inverted -original rs232_rx_block/m1_state[0] -translated rs232_rx_block/m1_state_i_0__Z

# Port mappping and directions

# Black box mapping


# Other sequential cells, including multidimensional arrays

# Constant Registers
vif_set_constant -original 0 ps2_block/rx_ascii[7]
vif_set_constant -original -1 clock_unit/dds_phase[1]
vif_set_constant -original -1 clock_unit/dds_phase[0]
vif_set_constant -original 1 rs232_tx_block/q[9]
vif_set_constant -original 0 rs232_tx_block/data_in_waiting[7]

# Retimed Registers

# Altera MAC annotations