jtag.map.summary

来自「Altera USB制作材料！有usb驱动！FPGA码源」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Wed Jun 13 16:24:30 2007
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : JTAG
Top-level Entity Name : JTAG
Family : MAX II
Total logic elements : 70
Total pins : 17
Total virtual pins : 0
UFM blocks : 0