lcdcont.map.qmsg

关于lcd的vhdl程序代码

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 157 12/07/2004 SJ Full Version " "Info: Version 4.2 Build 157 12/07/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Oct 26 16:49:06 2005 " "Info: Processing started: Wed Oct 26 16:49:06 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off lcdcont -c lcdcont " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off lcdcont -c lcdcont" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clockdiv.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file clockdiv.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clockdiv-behavioural " "Info: Found design unit 1: clockdiv-behavioural" {  } { { "clockdiv.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/clockdiv.vhd" 13 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 clockdiv " "Info: Found entity 1: clockdiv" {  } { { "clockdiv.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/clockdiv.vhd" 7 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "lcd.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file lcd.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lcd-behavioural " "Info: Found design unit 1: lcd-behavioural" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 26 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 lcd " "Info: Found entity 1: lcd" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 8 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "lcdcont.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file lcdcont.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lcdcont-structural " "Info: Found design unit 1: lcdcont-structural" {  } { { "lcdcont.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcdcont.vhd" 18 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 lcdcont " "Info: Found entity 1: lcdcont" {  } { { "lcdcont.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcdcont.vhd" 6 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "reset lcdcont.vhd(51) " "Warning: VHDL Process Statement warning at lcdcont.vhd(51): signal \"reset\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "lcdcont.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcdcont.vhd" 51 0 0 } }  } 0}
{ "Info" "IVRFX_VHDL_CASE_STATEMENT_OTHERS_CLAUSE_NEVER_SELECTED" "lcd.vhd(168) " "Info: VHDL Case Statement information at lcd.vhd(168): OTHERS choice is never selected" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 168 0 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:mylcd\|lcd_rw data_in GND " "Warning: Reduced register \"lcd:mylcd\|lcd_rw\" with stuck data_in port to stuck value GND" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 18 -1 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "lcd:mylcd\|write_mode High " "Info: Power-up level of register \"lcd:mylcd\|write_mode\" is not specified -- using power-up level of High to minimize register" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 48 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:mylcd\|write_mode data_in VCC " "Warning: Reduced register \"lcd:mylcd\|write_mode\" with stuck data_in port to stuck value VCC" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 48 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:mylcd\|lcd_data\[7\] data_in GND " "Warning: Reduced register \"lcd:mylcd\|lcd_data\[7\]\" with stuck data_in port to stuck value GND" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 16 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT" "\|lcdcont\|lcd:mylcd\|state 8 0 " "Info: State machine \"\|lcdcont\|lcd:mylcd\|state\" contains 8 states and 0 state bits" {  } {  } 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcdcont\|lcd:mylcd\|state " "Info: Selected Auto state machine encoding method for state machine \"\|lcdcont\|lcd:mylcd\|state\"" {  } {  } 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcdcont\|lcd:mylcd\|state " "Info: Encoding result for state machine \"\|lcdcont\|lcd:mylcd\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "8 " "Info: Completed encoding using 8 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.write " "Info: Encoded state bit \"lcd:mylcd\|state.write\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.idle " "Info: Encoded state bit \"lcd:mylcd\|state.idle\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.home " "Info: Encoded state bit \"lcd:mylcd\|state.home\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.setmode " "Info: Encoded state bit \"lcd:mylcd\|state.setmode\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.clear " "Info: Encoded state bit \"lcd:mylcd\|state.clear\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.dispoff " "Info: Encoded state bit \"lcd:mylcd\|state.dispoff\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.setfunc " "Info: Encoded state bit \"lcd:mylcd\|state.setfunc\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:mylcd\|state.warmup " "Info: Encoded state bit \"lcd:mylcd\|state.warmup\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0}  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.warmup 00000000 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.warmup\" uses code string \"00000000\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.setfunc 00000011 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.setfunc\" uses code string \"00000011\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.dispoff 00000101 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.dispoff\" uses code string \"00000101\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.clear 00001001 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.clear\" uses code string \"00001001\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.setmode 00010001 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.setmode\" uses code string \"00010001\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.home 00100001 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.home\" uses code string \"00100001\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.idle 01000001 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.idle\" uses code string \"01000001\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd:mylcd\|state.write 10000001 " "Info: State \"\|lcdcont\|lcd:mylcd\|state.write\" uses code string \"10000001\"" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:mylcd\|state.idle data_in GND " "Warning: Reduced register \"lcd:mylcd\|state.idle\" with stuck data_in port to stuck value GND" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 32 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "lcd:mylcd\|last_data_valid " "Warning: No clock transition on \"lcd:mylcd\|last_data_valid\" register" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 48 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:mylcd\|last_data_valid clock GND " "Warning: Reduced register \"lcd:mylcd\|last_data_valid\" with stuck clock port to stuck value GND" {  } { { "lcd.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 48 -1 0 } }  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "lcd:mylcd\|count\[0\]~37 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"lcd:mylcd\|count\[0\]~37\"" {  } { { "lcd.vhd" "count\[0\]~37" { Text "F:/quartus/演示程序/lcd_zifu/lcd.vhd" 48 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_p78.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_p78.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_p78 " "Info: Found entity 1: cntr_p78" {  } { { "db/cntr_p78.tdf" "" { Text "F:/quartus/演示程序/lcd_zifu/db/cntr_p78.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "data_out\[7\] GND " "Warning: Pin \"data_out\[7\]\" stuck at GND" {  } { { "lcdcont.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcdcont.vhd" 11 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "rw_out GND " "Warning: Pin \"rw_out\" stuck at GND" {  } { { "lcdcont.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcdcont.vhd" 12 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "cont GND " "Warning: Pin \"cont\" stuck at GND" {  } { { "lcdcont.vhd" "" { Text "F:/quartus/演示程序/lcd_zifu/lcdcont.vhd" 12 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "85 " "Info: Implemented 85 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "12 " "Info: Implemented 12 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "71 " "Info: Implemented 71 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 11 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 26 16:49:10 2005 " "Info: Processing ended: Wed Oct 26 16:49:10 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0}  } {  } 0}