📄 cpu.vhd
字号:
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when SUBB_R4 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when SUBB_R5 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when SUBB_R6 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when SUBB_R7 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
-------------------------------------
-- A0h
-------------------------------------
when ORL_C_NBIT =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when AJMP_5 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_C_BIT =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when INC_DPTR =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when MUL_AB =>
nr_bytes_a <= 1;
nr_cycles_a <= 8;
--when UNKNOWN =>
-- nr_bytes_a <= 1;
-- nr_cycles_a <= 1;
when MOV_IR0_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_IR1_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R0_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R1_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R2_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R3_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R4_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R5_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R6_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOV_R7_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
-------------------------------------
-- B0h
-------------------------------------
when ANL_C_NBIT =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when ACALL_5 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when CPL_BIT =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when CPL_C =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when CJNE_A_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_A_ADDR =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_IR0_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_IR1_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R0_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R1_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R2_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R3_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R4_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R5_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R6_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when CJNE_R7_N =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
-------------------------------------
-- C0h
-------------------------------------
when PUSH =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when AJMP_6 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when CLR_BIT =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when CLR_C =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when SWAP_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when XCH_IR0 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_IR1 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R0 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R1 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R2 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R3 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R4 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R5 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R6 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCH_R7 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
-------------------------------------
-- D0h
-------------------------------------
when POP =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when ACALL_6 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when SETB_BIT =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when SETB_C =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when DA_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when DJNZ_ADDR =>
nr_bytes_a <= 3;
nr_cycles_a <= 4;
when XCHD_IR0 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when XCHD_IR1 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when DJNZ_R0 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R1 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R2 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R3 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R4 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R5 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R6 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when DJNZ_R7 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
-------------------------------------
-- E0h
-------------------------------------
when MOVX_A_IDPTR =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when AJMP_7 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOVX_A_IR0 =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when MOVX_A_IR1 =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when CLR_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_ADDR =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when MOV_A_IR0 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_IR1 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R0 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R1 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R2 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R3 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R4 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R5 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R6 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_A_R7 =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
-------------------------------------
-- F0h
-------------------------------------
when MOVX_IDPTR_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when ACALL_7 =>
nr_bytes_a <= 2;
nr_cycles_a <= 4;
when MOVX_IR0_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when MOVX_IR1_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 4;
when CPL_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_ADDR_A =>
nr_bytes_a <= 2;
nr_cycles_a <= 2;
when MOV_IR0_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_IR1_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R0_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R1_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R2_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R3_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R4_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R5_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R6_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when MOV_R7_A =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
when others =>
nr_bytes_a <= 1;
nr_cycles_a <= 2;
end case;
end process;
--------------------------------------------------------------------
nr_decoder_proc:
--------------------------------------------------------------------
process (clk)
begin
if (clk'event and clk='1') then
-------------------------------------
-- Synchronous reset
-------------------------------------
if rst='1' then
nr_bytes <= 1;
nr_cycles <= 2;
else
-------------------------------------
-- Synchronous write
-------------------------------------
-- nr_bytes and nr_cycles flip-flops
----------------------------------
if not(nr_cycles=2 or
nr_cycles=4 or
nr_cycles=6 or
nr_cycles=8)
then
nr_cycles<= 2;
else
if codefetche_ff='1' then
if intreq='1' then -- Interrupt request
nr_bytes <= 3;
nr_cycles <= 4;
elsif debugmode='1' and debugstep='0' and debugstepff='0' then
nr_bytes <= 1; -- NOP
nr_cycles <= 2; -- NOP
else
nr_bytes <= nr_bytes_a;
nr_cycles <= nr_cycles_a;
end if;
end if;
end if;
end if;
end if;
end process;
end RTL;
--*******************************************************************--
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