seg73.tan.qmsg

递增方式在4位数码管上向上计数显示从0000-0001->0002……..9999….0000….0001…. -- 利用CPLD设计了一个4位十进制计数器

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register last_over register cntfirst\[2\] 64.02 MHz 15.62 ns Internal " "Info: Clock \"clk\" has Internal fmax of 64.02 MHz between source register \"last_over\" and destination register \"cntfirst\[2\]\" (period= 15.62 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.413 ns + Longest register register " "Info: + Longest register to register delay is 1.413 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns last_over 1 REG LC_X11_Y6_N0 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y6_N0; Fanout = 3; REG Node = 'last_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "" { last_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 29 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.546 ns) + CELL(0.114 ns) 0.660 ns process1~0 2 COMB LC_X11_Y6_N5 3 " "Info: 2: + IC(0.546 ns) + CELL(0.114 ns) = 0.660 ns; Loc. = LC_X11_Y6_N5; Fanout = 3; COMB Node = 'process1~0'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "0.660 ns" { last_over process1~0 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.444 ns) + CELL(0.309 ns) 1.413 ns cntfirst\[2\] 3 REG LC_X11_Y6_N1 5 " "Info: 3: + IC(0.444 ns) + CELL(0.309 ns) = 1.413 ns; Loc. = LC_X11_Y6_N1; Fanout = 5; REG Node = 'cntfirst\[2\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "0.753 ns" { process1~0 cntfirst[2] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 46 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.423 ns ( 29.94 % ) " "Info: Total cell delay = 0.423 ns ( 29.94 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.990 ns ( 70.06 % ) " "Info: Total interconnect delay = 0.990 ns ( 70.06 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.413 ns" { last_over process1~0 cntfirst[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "1.413 ns" { last_over process1~0 cntfirst[2] } { 0.000ns 0.546ns 0.444ns } { 0.000ns 0.114ns 0.309ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-13.946 ns - Smallest " "Info: - Smallest clock skew is -13.946 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 7.379 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 7.379 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_16 29 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_16; Fanout = 29; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "" { clk } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.935 ns) 3.005 ns div_cnt\[24\] 2 REG LC_X26_Y6_N7 6 " "Info: 2: + IC(0.601 ns) + CELL(0.935 ns) = 3.005 ns; Loc. = LC_X26_Y6_N7; Fanout = 6; REG Node = 'div_cnt\[24\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.536 ns" { clk div_cnt[24] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 37 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.663 ns) + CELL(0.711 ns) 7.379 ns cntfirst\[2\] 3 REG LC_X11_Y6_N1 5 " "Info: 3: + IC(3.663 ns) + CELL(0.711 ns) = 7.379 ns; Loc. = LC_X11_Y6_N1; Fanout = 5; REG Node = 'cntfirst\[2\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.374 ns" { div_cnt[24] cntfirst[2] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 46 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 42.21 % ) " "Info: Total cell delay = 3.115 ns ( 42.21 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.264 ns ( 57.79 % ) " "Info: Total interconnect delay = 4.264 ns ( 57.79 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "7.379 ns" { clk div_cnt[24] cntfirst[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.379 ns" { clk clk~out0 div_cnt[24] cntfirst[2] } { 0.000ns 0.000ns 0.601ns 3.663ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 21.325 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 21.325 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_16 29 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_16; Fanout = 29; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "" { clk } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.935 ns) 3.005 ns div_cnt\[24\] 2 REG LC_X26_Y6_N7 6 " "Info: 2: + IC(0.601 ns) + CELL(0.935 ns) = 3.005 ns; Loc. = LC_X26_Y6_N7; Fanout = 6; REG Node = 'div_cnt\[24\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.536 ns" { clk div_cnt[24] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 37 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.663 ns) + CELL(0.935 ns) 7.603 ns first_over 3 REG LC_X11_Y6_N5 5 " "Info: 3: + IC(3.663 ns) + CELL(0.935 ns) = 7.603 ns; Loc. = LC_X11_Y6_N5; Fanout = 5; REG Node = 'first_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.598 ns" { div_cnt[24] first_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 26 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.855 ns) + CELL(0.935 ns) 12.393 ns second_over 4 REG LC_X10_Y6_N8 5 " "Info: 4: + IC(3.855 ns) + CELL(0.935 ns) = 12.393 ns; Loc. = LC_X10_Y6_N8; Fanout = 5; REG Node = 'second_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.790 ns" { first_over second_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.830 ns) + CELL(0.935 ns) 17.158 ns third_over 5 REG LC_X8_Y6_N6 5 " "Info: 5: + IC(3.830 ns) + CELL(0.935 ns) = 17.158 ns; Loc. = LC_X8_Y6_N6; Fanout = 5; REG Node = 'third_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.765 ns" { second_over third_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.456 ns) + CELL(0.711 ns) 21.325 ns last_over 6 REG LC_X11_Y6_N0 3 " "Info: 6: + IC(3.456 ns) + CELL(0.711 ns) = 21.325 ns; Loc. = LC_X11_Y6_N0; Fanout = 3; REG Node = 'last_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.167 ns" { third_over last_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 29 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.920 ns ( 27.76 % ) " "Info: Total cell delay = 5.920 ns ( 27.76 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "15.405 ns ( 72.24 % ) " "Info: Total interconnect delay = 15.405 ns ( 72.24 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "21.325 ns" { clk div_cnt[24] first_over second_over third_over last_over } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "21.325 ns" { clk clk~out0 div_cnt[24] first_over second_over third_over last_over } { 0.000ns 0.000ns 0.601ns 3.663ns 3.855ns 3.830ns 3.456ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "7.379 ns" { clk div_cnt[24] cntfirst[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.379 ns" { clk clk~out0 div_cnt[24] cntfirst[2] } { 0.000ns 0.000ns 0.601ns 3.663ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "21.325 ns" { clk div_cnt[24] first_over second_over third_over last_over } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "21.325 ns" { clk clk~out0 div_cnt[24] first_over second_over third_over last_over } { 0.000ns 0.000ns 0.601ns 3.663ns 3.855ns 3.830ns 3.456ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 29 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 46 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.413 ns" { last_over process1~0 cntfirst[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "1.413 ns" { last_over process1~0 cntfirst[2] } { 0.000ns 0.546ns 0.444ns } { 0.000ns 0.114ns 0.309ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "7.379 ns" { clk div_cnt[24] cntfirst[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.379 ns" { clk clk~out0 div_cnt[24] cntfirst[2] } { 0.000ns 0.000ns 0.601ns 3.663ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "21.325 ns" { clk div_cnt[24] first_over second_over third_over last_over } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "21.325 ns" { clk clk~out0 div_cnt[24] first_over second_over third_over last_over } { 0.000ns 0.000ns 0.601ns 3.663ns 3.855ns 3.830ns 3.456ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk dataout\[3\] cntlast\[3\] 31.007 ns register " "Info: tco from clock \"clk\" to destination pin \"dataout\[3\]\" through register \"cntlast\[3\]\" is 31.007 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 21.325 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 21.325 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_16 29 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_16; Fanout = 29; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "" { clk } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.935 ns) 3.005 ns div_cnt\[24\] 2 REG LC_X26_Y6_N7 6 " "Info: 2: + IC(0.601 ns) + CELL(0.935 ns) = 3.005 ns; Loc. = LC_X26_Y6_N7; Fanout = 6; REG Node = 'div_cnt\[24\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.536 ns" { clk div_cnt[24] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 37 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.663 ns) + CELL(0.935 ns) 7.603 ns first_over 3 REG LC_X11_Y6_N5 5 " "Info: 3: + IC(3.663 ns) + CELL(0.935 ns) = 7.603 ns; Loc. = LC_X11_Y6_N5; Fanout = 5; REG Node = 'first_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.598 ns" { div_cnt[24] first_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 26 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.855 ns) + CELL(0.935 ns) 12.393 ns second_over 4 REG LC_X10_Y6_N8 5 " "Info: 4: + IC(3.855 ns) + CELL(0.935 ns) = 12.393 ns; Loc. = LC_X10_Y6_N8; Fanout = 5; REG Node = 'second_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.790 ns" { first_over second_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.830 ns) + CELL(0.935 ns) 17.158 ns third_over 5 REG LC_X8_Y6_N6 5 " "Info: 5: + IC(3.830 ns) + CELL(0.935 ns) = 17.158 ns; Loc. = LC_X8_Y6_N6; Fanout = 5; REG Node = 'third_over'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.765 ns" { second_over third_over } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.456 ns) + CELL(0.711 ns) 21.325 ns cntlast\[3\] 6 REG LC_X11_Y6_N2 4 " "Info: 6: + IC(3.456 ns) + CELL(0.711 ns) = 21.325 ns; Loc. = LC_X11_Y6_N2; Fanout = 4; REG Node = 'cntlast\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.167 ns" { third_over cntlast[3] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 96 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.920 ns ( 27.76 % ) " "Info: Total cell delay = 5.920 ns ( 27.76 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "15.405 ns ( 72.24 % ) " "Info: Total interconnect delay = 15.405 ns ( 72.24 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "21.325 ns" { clk div_cnt[24] first_over second_over third_over cntlast[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "21.325 ns" { clk clk~out0 div_cnt[24] first_over second_over third_over cntlast[3] } { 0.000ns 0.000ns 0.601ns 3.663ns 3.855ns 3.830ns 3.456ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 96 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.458 ns + Longest register pin " "Info: + Longest register to pin delay is 9.458 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cntlast\[3\] 1 REG LC_X11_Y6_N2 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y6_N2; Fanout = 4; REG Node = 'cntlast\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "" { cntlast[3] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 96 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.151 ns) + CELL(0.590 ns) 1.741 ns data4\[3\]~373 2 COMB LC_X9_Y6_N5 1 " "Info: 2: + IC(1.151 ns) + CELL(0.590 ns) = 1.741 ns; Loc. = LC_X9_Y6_N5; Fanout = 1; COMB Node = 'data4\[3\]~373'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.741 ns" { cntlast[3] data4[3]~373 } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.677 ns) + CELL(0.442 ns) 2.860 ns data4\[3\]~374 3 COMB LC_X8_Y6_N2 7 " "Info: 3: + IC(0.677 ns) + CELL(0.442 ns) = 2.860 ns; Loc. = LC_X8_Y6_N2; Fanout = 7; COMB Node = 'data4\[3\]~374'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.119 ns" { data4[3]~373 data4[3]~374 } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.340 ns) + CELL(0.590 ns) 4.790 ns Mux~190 4 COMB LC_X8_Y7_N8 1 " "Info: 4: + IC(1.340 ns) + CELL(0.590 ns) = 4.790 ns; Loc. = LC_X8_Y7_N8; Fanout = 1; COMB Node = 'Mux~190'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "1.930 ns" { data4[3]~374 Mux~190 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.544 ns) + CELL(2.124 ns) 9.458 ns dataout\[3\] 5 PIN PIN_2 0 " "Info: 5: + IC(2.544 ns) + CELL(2.124 ns) = 9.458 ns; Loc. = PIN_2; Fanout = 0; PIN Node = 'dataout\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "4.668 ns" { Mux~190 dataout[3] } "NODE_NAME" } "" } } { "seg73.vhd" "" { Text "E:/7段数码管/seg73/seg73.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.746 ns ( 39.61 % ) " "Info: Total cell delay = 3.746 ns ( 39.61 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.712 ns ( 60.39 % ) " "Info: Total interconnect delay = 5.712 ns ( 60.39 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "9.458 ns" { cntlast[3] data4[3]~373 data4[3]~374 Mux~190 dataout[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.458 ns" { cntlast[3] data4[3]~373 data4[3]~374 Mux~190 dataout[3] } { 0.000ns 1.151ns 0.677ns 1.340ns 2.544ns } { 0.000ns 0.590ns 0.442ns 0.590ns 2.124ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "21.325 ns" { clk div_cnt[24] first_over second_over third_over cntlast[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "21.325 ns" { clk clk~out0 div_cnt[24] first_over second_over third_over cntlast[3] } { 0.000ns 0.000ns 0.601ns 3.663ns 3.855ns 3.830ns 3.456ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "seg73" "UNKNOWN" "V1" "E:/7段数码管/seg73/db/seg73.quartus_db" { Floorplan "E:/7段数码管/seg73/" "" "9.458 ns" { cntlast[3] data4[3]~373 data4[3]~374 Mux~190 dataout[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.458 ns" { cntlast[3] data4[3]~373 data4[3]~374 Mux~190 dataout[3] } { 0.000ns 1.151ns 0.677ns 1.340ns 2.544ns } { 0.000ns 0.590ns 0.442ns 0.590ns 2.124ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Jul 11 20:38:33 2008 " "Info: Processing ended: Fri Jul 11 20:38:33 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}