test1_v.tdo

SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序

## NOTE: Do not edit this file.
## Auto generated by Project Navigator for Verilog Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module VSP2232
vlog  "D:/Xilinx/verilog/src/glbl.v"
vlog  VSP2232_timesim.v
vlog  test1.v
vsim -t 1ps +maxdelays -L simprims_ver  -lib work test1_v glbl
do {test1_v.udo}
view wave
add wave *
add wave /glbl/GSR
view structure
view signals
run 1000ns
## End