shuju_timesim.sdf
来自「SONY公司出品的黑白CCD(44万像素)ICX229的驱动信号产生程序」· SDF 代码 · 共 2,917 行 · 第 1/5 页
SDF
2,917 行
) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_11_42) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_12_43) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE Ker10_SW0) (DELAY (ABSOLUTE (PORT ADR0 ( 753 )) (PORT ADR2 ( 572 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0001\<2\>2) (DELAY (ABSOLUTE (PORT ADR0 ( 587 )) (PORT ADR1 ( 682 )) (PORT ADR2 ( 1271 )) (PORT ADR3 ( 1183 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE count_2_44) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n000013) (DELAY (ABSOLUTE (PORT ADR0 ( 1820 )) (PORT ADR1 ( 940 )) (PORT ADR2 ( 15 )) (PORT ADR3 ( 345 )) (IOPATH ADR0 O ( 539 )) (IOPATH ADR1 O ( 539 )) (IOPATH ADR2 O ( 539 )) (IOPATH ADR3 O ( 539 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE count_0_45) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0001\<1\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 764 )) (PORT ADR1 ( 614 )) (PORT ADR2 ( 1245 )) (PORT ADR3 ( 1978 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE count_1_46) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0001\<3\>) (DELAY (ABSOLUTE (PORT ADR0 ( 572 )) (PORT ADR1 ( 652 )) (PORT ADR2 ( 374 )) (PORT ADR3 ( 31 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE count_3_47) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<14\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 2932 )) (PORT ADR1 ( 661 )) (PORT ADR2 ( 1425 )) (PORT ADR3 ( 15 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_14_48) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0001\<4\>_SW0) (DELAY (ABSOLUTE (PORT ADR0 ( 1081 )) (PORT ADR1 ( 976 )) (PORT ADR2 ( 475 )) (PORT ADR3 ( 15 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE sdata_49) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<8\>16_SW0) (DELAY (ABSOLUTE (PORT ADR0 ( 2172 )) (PORT ADR1 ( 2152 )) (PORT ADR2 ( 428 )) (PORT ADR3 ( 394 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<15\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 644 )) (PORT ADR1 ( 1794 )) (PORT ADR2 ( 1427 )) (PORT ADR3 ( 15 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_15_50) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<4\>0) (DELAY (ABSOLUTE (PORT ADR0 ( 207 )) (PORT ADR1 ( 601 )) (PORT ADR2 ( 15 )) (PORT ADR3 ( 655 )) (IOPATH ADR0 O ( 539 )) (IOPATH ADR1 O ( 539 )) (IOPATH ADR2 O ( 539 )) (IOPATH ADR3 O ( 539 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<5\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 586 )) (PORT ADR1 ( 2426 )) (PORT ADR2 ( 15 )) (PORT ADR3 ( 1592 )) (IOPATH ADR0 O ( 539 )) (IOPATH ADR1 O ( 539 )) (IOPATH ADR2 O ( 539 )) (IOPATH ADR3 O ( 539 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_5_51) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1514)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_8_52) (DELAY (ABSOLUTE (PORT SET ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SSET) (posedge CLK) (990)(0)) (WIDTH (posedge SET) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<9\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 770 )) (PORT ADR1 ( 601 )) (PORT ADR2 ( 1186 )) (PORT ADR3 ( 15 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_9_53) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0003\<1\>11) (DELAY (ABSOLUTE (PORT ADR2 ( 1846 )) (PORT ADR3 ( 554 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE zhuangtai_1_54) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SSET) (posedge CLK) (990)(0)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<12\>0) (DELAY (ABSOLUTE (PORT ADR0 ( 587 )) (PORT ADR1 ( 753 )) (PORT ADR2 ( 15 )) (PORT ADR3 ( 737 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<13\>5) (DELAY (ABSOLUTE (PORT ADR0 ( 735 )) (PORT ADR1 ( 720 )) (PORT ADR2 ( 1222 )) (PORT ADR3 ( 15 )) (IOPATH ADR0 O ( 539 )) (IOPATH ADR1 O ( 539 )) (IOPATH ADR2 O ( 539 )) (IOPATH ADR3 O ( 539 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0008_55) (DELAY (ABSOLUTE (PORT ADR0 ( 711 )) (PORT ADR1 ( 770 )) (PORT ADR2 ( 929 )) (PORT ADR3 ( 32 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0008_SW6_SW0) (DELAY (ABSOLUTE (PORT ADR0 ( 711 )) (PORT ADR2 ( 929 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0008_SW5) (DELAY (ABSOLUTE (PORT ADR0 ( 843 )) (PORT ADR1 ( 963 )) (PORT ADR2 ( 876 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0002\<6\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 598 )) (PORT ADR1 ( 1422 )) (PORT ADR2 ( 2232 )) (PORT ADR3 ( 762 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3 O ( 596 )) ) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_6_56) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_SFF") (INSTANCE datain_3_57) (DELAY (ABSOLUTE (PORT RST ( 9276 )) (IOPATH CLK O ( 720 )) (IOPATH SET O ( 720 )) (IOPATH RST O ( 720 )) ) ) (TIMINGCHECK (SETUPHOLD (posedge I) (posedge CLK) (81)(381)) (SETUPHOLD (negedge I) (posedge CLK) (81)(381)) (PERIOD (posedge CLK) (1570)) (SETUPHOLD (posedge SRST) (posedge CLK) (990)(0)) (SETUPHOLD (negedge SRST) (posedge CLK) (990)(0)) (WIDTH (posedge RST) (1725)) ) ) (CELL (CELLTYPE "X_LUT4") (INSTANCE _n0003\<0\>1) (DELAY (ABSOLUTE (PORT ADR0 ( 752 )) (PORT ADR1 ( 697 )) (PORT ADR2 ( 1186 )) (IOPATH ADR0 O ( 596 )) (IOPATH ADR1 O ( 596 )) (IOPATH ADR2 O ( 596 )) (IOPATH ADR3
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?