test.v

来自「SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序」· Verilog 代码 · 共 75 行

`timescale 1ns / 1ps

////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:   13:52:46 01/04/2008
// Design Name:   ICX229
// Module Name:   test.v
// Project Name:  ICX229AL
// Target Device:  
// Tool versions:  
// Description: 
//
// Verilog Test Fixture created by ISE for module: ICX229
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////

module test_v;

	// Inputs
	reg clk;
	reg rst;

	// Outputs
	wire v1;
	wire v1h;
	wire v2;
	wire v3;
	wire v3h;
	wire v4;
	wire h1;
	wire h2;
	wire r;
	wire sub;

	// Instantiate the Unit Under Test (UUT)
	ICX229 uut (
		.clk(clk), 
		.rst(rst), 
		.v1(v1), 
		.v1h(v1h), 
		.v2(v2), 
		.v3(v3), 
		.v3h(v3h), 
		.v4(v4), 
		.h1(h1), 
		.h2(h2), 
		.r(r),
		.sub(sub)
	);
  	always #5 clk=~clk;
	initial begin
		// Initialize Inputs
	   clk = 0;
		rst = 1;
		#10 rst=0;
		#110 rst=1;

		// Wait 100 ns for global reset to finish
		#100;
        
	

	end
      
endmodule