test2.v

来自「SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序」· Verilog 代码 · 共 61 行

`timescale 1ns / 1ps

////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:   15:00:31 01/08/2008
// Design Name:   serial
// Module Name:   test2.v
// Project Name:  ICX229AL
// Target Device:  
// Tool versions:  
// Description: 
//
// Verilog Test Fixture created by ISE for module: serial
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////

module test2_v;

	// Inputs
	reg clk;
	reg rst;

	// Outputs

	wire reset;
	wire sload;
	wire sclk;


	// Instantiate the Unit Under Test (UUT)
	serial uut (
		.clk(clk), 
		.rst(rst),
		.reset(reset), 
		.sload(sload), 
		.sclk(sclk)
	);

	always #17.46 clk=~clk;
	initial begin
		// Initialize Inputs
	   clk = 0;
		rst = 1;
		#10 rst=0;
		#110 rst=1;

		// Wait 100 ns for global reset to finish
		#100000;
	end
      
endmodule