clk_timesim.sdf

来自「SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序」· SDF 代码 · 共 141 行

(DELAYFILE
  (SDFVERSION "3.0")
  (DESIGN "clk")
  (DATE "Wed Jan 09 17:20:10 2008")
  (VENDOR "Xilinx")
  (PROGRAM "Xilinx SDF Writer")
  (VERSION "H.42")
  (DIVIDER /)
  (VOLTAGE 1.14:1.14:1.14)
  (TEMPERATURE 85:85:85)
  (TIMESCALE 1 ps)
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE clk_BUFGP\/IBUFG_0)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 859 ))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE clk\/IFF\/IMUX)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 1079 ))
        )
      )
  )
  (CELL (CELLTYPE "X_TRI")
    (INSTANCE clk1_OBUF_1)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (PORT I ( 24 ))
          (PORT CTL ( 24 ))
          (IOPATH I O ( 3690 ))
          (IOPATH CTL O ( 3690 ))
        )
      )
  )
  (CELL (CELLTYPE "X_INV")
    (INSTANCE clk1\/ENABLEINV)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 8049 ))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE rst_IBUF)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 859 ))
        )
      )
  )
  (CELL (CELLTYPE "X_BUFGMUX")
    (INSTANCE clk_BUFGP\/BUFG)
      (DELAY
        (ABSOLUTE
          (PORT I0 ( 0 ))
          (IOPATH I0 O ( 0 ))
          (IOPATH I1 O ( 0 ))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge S) (posedge I0) (600)(0))
        (SETUPHOLD (negedge S) (posedge I0) (600)(0))
        (SETUPHOLD (posedge S) (posedge I1) (600)(0))
        (SETUPHOLD (negedge S) (posedge I1) (600)(0))
      )
  )
  (CELL (CELLTYPE "X_INV")
    (INSTANCE clk_BUFGP\/BUFG\/SINV)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 0 ))
        )
      )
  )
  (CELL (CELLTYPE "X_INV")
    (INSTANCE clk1_OBUF\/DYMUX_2)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 876 ))
        )
      )
  )
  (CELL (CELLTYPE "X_INV")
    (INSTANCE clk1_OBUF\/SRINV)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 2080 ))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE clk1_OBUF\/CLKINV_3)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 1033 ))
        )
      )
  )
  (CELL (CELLTYPE "X_SFF")
    (INSTANCE clk1_4)
      (DELAY
        (ABSOLUTE
          (PORT SET ( 9276 ))
          (IOPATH CLK O ( 720 ))
          (IOPATH SET O ( 720 ))
          (IOPATH RST O ( 720 ))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (81)(381))
        (SETUPHOLD (negedge I) (posedge CLK) (81)(381))
        (PERIOD (posedge CLK) (1570))
        (SETUPHOLD (posedge SSET) (posedge CLK) (990)(0))
        (SETUPHOLD (negedge SSET) (posedge CLK) (990)(0))
        (WIDTH (posedge SET) (1725))
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE clk1\/OUTPUT\/OFF\/OMUX)
      (DELAY
        (PATHPULSE (757))
        (ABSOLUTE
          (IOPATH I O ( 1018 ))
        )
      )
  )
)