vsp2232_timesim.v

SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序

////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____
//  /   /\/   /
// /___/  \  /    Vendor: Xilinx
// \   \   \/     Version: H.42
//  \   \         Application: netgen
//  /   /         Filename: VSP2232_timesim.v
// /___/   /\     Timestamp: Fri Jan 11 17:10:00 2008
// \   \  /  \ 
//  \___\/\___\
//             
// Command	: -intstyle ise -s 4 -pcf VSP2232.pcf -sdf_anno true -w -ofmt verilog -sim VSP2232.ncd VSP2232_timesim.v 
// Device	: 3s400pq208-4 (PRODUCTION 1.37 2005-07-22)
// Input file	: VSP2232.ncd
// Output file	: VSP2232_timesim.v
// # of Modules	: 1
// Design Name	: VSP2232
// Xilinx	: D:/Xilinx
//             
// Purpose:    
//     This verilog netlist is a verification model and uses simulation 
//     primitives which may not represent the true implementation of the 
//     device, however the netlist is functionally correct and should not 
//     be modified. This file cannot be synthesized and should only be used 
//     with supported simulation tools.
//             
// Reference:  
//     Development System Reference Guide, Chapter 23
//     Synthesis and Verification Design Guide, Chapter 6
//             
////////////////////////////////////////////////////////////////////////////////

`timescale 1 ns/1 ps

module VSP2232 (
  clk, rst, shp, adcck, clpdm, pblk, clpob, shd
);
  input clk;
  input rst;
  output shp;
  output adcck;
  output clpdm;
  output pblk;
  output clpob;
  output shd;
  wire clk_BUFGP;
  wire rst_IBUF;
  wire \va<2> ;
  wire \va<0> ;
  wire \va<1> ;
  wire \va<3> ;
  wire N29_0;
  wire \vb<1> ;
  wire \vb<0> ;
  wire \vb<2> ;
  wire \vb<3> ;
  wire N25_0;
  wire \vc<0> ;
  wire \vc<3> ;
  wire \vc<1> ;
  wire \vc<2> ;
  wire t1_FFd1;
  wire N136;
  wire \vd<0> ;
  wire _n0048_0;
  wire N161_0;
  wire N209;
  wire t4_FFd5;
  wire _n0016_0;
  wire N94_0;
  wire N197;
  wire t3_FFd1;
  wire N26;
  wire t3_FFd2;
  wire \ve<3> ;
  wire \ve<1> ;
  wire \ve<0> ;
  wire \ve<8> ;
  wire t5_FFd1;
  wire N199_0;
  wire N144_0;
  wire \vd<14> ;
  wire _n00482_0;
  wire \vd<7> ;
  wire N191_0;
  wire N182_0;
  wire \vd<9> ;
  wire \vd<3> ;
  wire N188_0;
  wire N170_0;
  wire \vd<6> ;
  wire \vd<8> ;
  wire N179_0;
  wire N185_0;
  wire \vd<5> ;
  wire \vd<4> ;
  wire N176_0;
  wire N173_0;
  wire t4_FFd4;
  wire _n0015_0;
  wire N239_0;
  wire N245_0;
  wire N132;
  wire t2_FFd1;
  wire N241_0;
  wire N257_0;
  wire \vd<10> ;
  wire \vd<12> ;
  wire \vd<1> ;
  wire N128_0;
  wire N211_0;
  wire N203_0;
  wire N140_0;
  wire N201_0;
  wire N231_0;
  wire N243_0;
  wire N259_0;
  wire \ve<7> ;
  wire \ve<12> ;
  wire \ve<4> ;
  wire \ve<11> ;
  wire \ve<6> ;
  wire \ve<5> ;
  wire CHOICE3_0;
  wire N150_0;
  wire \vd<11> ;
  wire _n0048_2;
  wire \vd<13> ;
  wire \vd<2> ;
  wire N155_0;
  wire N19_0;
  wire t5_FFd2;
  wire _n0023_0;
  wire _n0024;
  wire pblk_OBUF;
  wire _n0022;
  wire N44_0;
  wire shp_OBUF;
  wire N30;
  wire shd_OBUF;
  wire N261;
  wire N253_0;
  wire N247_0;
  wire N255_0;
  wire N2611_0;
  wire t4_FFd4_1;
  wire N152_0;
  wire N134;
  wire GLOBAL_LOGIC0;
  wire _n0012_0;
  wire t4_FFd1;
  wire t4_FFd3;
  wire N32;
  wire N158_0;
  wire N17;
  wire N263_0;
  wire N11;
  wire N21;
  wire \_n0041<1> ;
  wire \VSP2232__n0041<1>_cyo ;
  wire \_n0041<2> ;
  wire \_n0041<3> ;
  wire \VSP2232__n0041<3>_cyo ;
  wire \_n0041<4> ;
  wire \_n0041<5> ;
  wire \VSP2232__n0041<5>_cyo ;
  wire \_n0041<6> ;
  wire \_n0041<7> ;
  wire \VSP2232__n0041<7>_cyo ;
  wire \_n0041<8> ;
  wire \_n0041<9> ;
  wire \VSP2232__n0041<9>_cyo ;
  wire \_n0041<10> ;
  wire \_n0041<11> ;
  wire \VSP2232__n0041<11>_cyo ;
  wire \_n0041<12> ;
  wire \_n0041<13> ;
  wire \_n0041<14> ;
  wire \_n0042<1> ;
  wire \VSP2232__n0042<1>_cyo ;
  wire \ve<2> ;
  wire \_n0042<2> ;
  wire \_n0042<3> ;
  wire \VSP2232__n0042<3>_cyo ;
  wire \_n0042<4> ;
  wire \_n0042<5> ;
  wire \VSP2232__n0042<5>_cyo ;
  wire \_n0042<6> ;
  wire \_n0042<7> ;
  wire \VSP2232__n0042<7>_cyo ;
  wire \ve<9> ;
  wire \_n0042<8> ;
  wire \_n0042<9> ;
  wire \VSP2232__n0042<9>_cyo ;
  wire \ve<10> ;
  wire \_n0042<10> ;
  wire \_n0042<11> ;
  wire \VSP2232__n0042<11>_cyo ;
  wire \ve<13> ;
  wire \_n0042<12> ;
  wire \_n0042<13> ;
  wire \ve<14> ;
  wire \_n0042<14> ;
  wire \clk_BUFGP/IBUFG ;
  wire clpob_OBUF;
  wire GLOBAL_LOGIC1;
  wire N167;
  wire N126_0;
  wire _n0013;
  wire t4_FFd2;
  wire N164;
  wire CHOICE8;
  wire N205_0;
  wire \_n0048_1/O ;
  wire \t5_FFd2-In_SW1/O ;
  wire N39_0;
  wire N15_0;
  wire _n0048_21;
  wire \Ker0_SW26_SW0/O ;
  wire N189_0;
  wire N194_0;
  wire N138;
  wire \Ker15_SW2/O ;
  wire N123;
  wire N6_0;
  wire \Ker0_SW2/O ;
  wire \Ker0_SW4/O ;
  wire \Ker0_SW6/O ;
  wire \Ker0_SW30/O ;
  wire \Ker0_SW28/O ;
  wire \Ker0_SW10/O ;
  wire \Ker0_SW12/O ;
  wire \Ker0_SW14/O ;
  wire \Ker1_SW0/O ;
  wire N68_0;
  wire N18_0;
  wire N12_0;
  wire \Ker0_SW16/O ;
  wire \Ker0_SW18/O ;
  wire \_n0014_SW0/O ;
  wire _n0014_0;
  wire \Ker0_SW20/O ;
  wire \Ker0_SW22/O ;
  wire \Ker0_SW24/O ;
  wire \Ker17/O ;
  wire N72;
  wire \Ker16_SW2/O ;
  wire \_n00241_SW0/O ;
  wire \Ker16_SW1/O ;
  wire GSR = glbl.GSR;
  wire GTS = glbl.GTS;
  wire N29;
  wire \va<2>/DYMUX ;
  wire \_n0029<2> ;
  wire \va<2>/SRINVNOT ;
  wire \va<2>/CLKINV ;
  wire N25;
  wire \vb<1>/DYMUX ;
  wire \_n0031<1> ;
  wire \vb<1>/SRINVNOT ;
  wire \vb<1>/CLKINV ;
  wire \vc<3>/DXMUX ;
  wire \_n0033<3> ;
  wire \vc<3>/DYMUX ;
  wire \_n0033<2> ;
  wire \vc<3>/SRINVNOT ;
  wire \vc<3>/CLKINV ;
  wire \t1_FFd1/REVUSED ;
  wire \t1_FFd1/DYMUX ;
  wire N9;
  wire \t1_FFd1/SRINVNOT ;
  wire \t1_FFd1/CLKINV ;
  wire \va<3>/DXMUX ;
  wire \_n0029<3> ;
  wire N136_pack_1;
  wire \va<3>/SRINVNOT ;
  wire \va<3>/CLKINV ;
  wire \vd<0>/DXMUX ;
  wire \_n0035<0>1/O ;
  wire N209_pack_1;
  wire \vd<0>/SRINVNOT ;
  wire \vd<0>/CLKINV ;
  wire \t3_FFd1/DXMUX ;
  wire \t3_FFd1-In ;
  wire N26_pack_1;
  wire \t3_FFd1/SRINVNOT ;
  wire \t3_FFd1/CLKINV ;
  wire N199;
  wire N144;
  wire N191;
  wire N182;
  wire N188;
  wire N170;
  wire N179;
  wire N185;
  wire N176;
  wire N173;
  wire N239;
  wire N245;
  wire \vb<2>/DXMUX ;
  wire \_n0031<2> ;
  wire N132_pack_1;
  wire \vb<2>/SRINVNOT ;
  wire \vb<2>/CLKINV ;
  wire N241;
  wire N257;
  wire N128;
  wire N211;
  wire N203;
  wire N140;
  wire N201;
  wire N231;
  wire N243;
  wire N259;
  wire \vd<2>/DXMUX ;
  wire \_n0035<2>1/O ;
  wire \Ker0_SW12/O_pack_1 ;
  wire \vd<2>/SRINVNOT ;
  wire \vd<2>/CLKINV ;
  wire \vd<3>/DXMUX ;
  wire \_n0035<3>1/O ;
  wire \Ker0_SW14/O_pack_1 ;
  wire \vd<3>/SRINVNOT ;
  wire \vd<3>/CLKINV ;
  wire N12;
  wire \Ker1_SW0/O_pack_1 ;
  wire \vd<4>/DXMUX ;
  wire \_n0035<4>1/O ;
  wire \Ker0_SW16/O_pack_1 ;
  wire \vd<4>/SRINVNOT ;
  wire \vd<4>/CLKINV ;
  wire \ve<1>/DXMUX ;
  wire \_n0037<1>1/O ;
  wire \ve<1>/DYMUX ;
  wire \_n0037<0>1/O ;
  wire \ve<1>/SRINVNOT ;
  wire \ve<1>/CLKINV ;
  wire \vd<5>/DXMUX ;
  wire \_n0035<5>1/O ;
  wire \Ker0_SW18/O_pack_1 ;
  wire \vd<5>/SRINVNOT ;
  wire \vd<5>/CLKINV ;
  wire _n0014;
  wire \_n0014_SW0/O_pack_1 ;
  wire \ve<3>/DXMUX ;
  wire \_n0037<3>1/O ;
  wire \ve<3>/DYMUX ;
  wire \_n0037<2>1/O ;
  wire \ve<3>/SRINVNOT ;
  wire \ve<3>/CLKINV ;
  wire \vd<6>/DXMUX ;
  wire \_n0035<6>1/O ;
  wire \Ker0_SW20/O_pack_1 ;
  wire \vd<6>/SRINVNOT ;
  wire \vd<6>/CLKINV ;
  wire N6;
  wire N197_pack_1;
  wire \vd<7>/DXMUX ;
  wire \_n0035<7>1/O ;
  wire \Ker0_SW22/O_pack_1 ;
  wire \vd<7>/SRINVNOT ;
  wire \vd<7>/CLKINV ;
  wire \ve<5>/DXMUX ;
  wire \_n0037<5>1/O ;
  wire \ve<5>/DYMUX ;
  wire \_n0037<4>1/O ;
  wire \ve<5>/SRINVNOT ;
  wire \ve<5>/CLKINV ;
  wire \vd<8>/DXMUX ;
  wire \_n0035<8>1/O ;
  wire \Ker0_SW24/O_pack_1 ;
  wire \vd<8>/SRINVNOT ;
  wire \vd<8>/CLKINV ;
  wire \vd<9>/DYMUX ;
  wire \_n0035<9>1/O ;
  wire \vd<9>/SRINVNOT ;
  wire \vd<9>/CLKINV ;
  wire \ve<7>/DXMUX ;
  wire \_n0037<7>1/O ;
  wire \ve<7>/DYMUX ;
  wire \_n0037<6>1/O ;
  wire \ve<7>/SRINVNOT ;
  wire \ve<7>/CLKINV ;
  wire \pblk_OBUF/DXMUX ;
  wire \_n0036/O ;
  wire _n0024_pack_1;
  wire \pblk_OBUF/SRINVNOT ;
  wire \pblk_OBUF/CLKINV ;
  wire N94;
  wire \Ker17/O_pack_1 ;
  wire \ve<9>/DXMUX ;
  wire \_n0037<9>1/O ;
  wire \ve<9>/DYMUX ;
  wire \_n0037<8>1/O ;
  wire \ve<9>/SRINVNOT ;
  wire \ve<9>/CLKINV ;
  wire \pblk/ENABLE ;
  wire \pblk/O ;
  wire \clk_BUFGP/BUFG/S_INVNOT ;
  wire \N167/F5MUX ;
  wire \Ker0_SW11_G/O ;
  wire \N167/BXINV ;
  wire \Ker0_SW11_F/O ;
  wire \clpob_OBUF/DXMUX ;
  wire \clpob_OBUF/F5MUX ;
  wire \_n0034_G/O ;
  wire \clpob_OBUF/BXINV ;
  wire \_n0034_F/O ;
  wire \clpob_OBUF/SRINVNOT ;
  wire \clpob_OBUF/CLKINV ;
  wire \N164/F5MUX ;
  wire \Ker0_SW9_G/O ;
  wire \N164/BXINV ;
  wire \Ker0_SW9_F/O ;
  wire N205;
  wire CHOICE8_pack_1;
  wire N126;
  wire \_n0048_1/O_pack_1 ;
  wire \t5_FFd2/DXMUX ;
  wire \t5_FFd2-In/O ;
  wire \t5_FFd2-In_SW1/O_pack_1 ;
  wire \t5_FFd2/SRINVNOT ;
  wire \t5_FFd2/CLKINV ;
  wire N189;
  wire \Ker0_SW26_SW0/O_pack_1 ;
  wire N194;
  wire _n0048_2_pack_1;
  wire N42;
  wire _n0013_pack_1;
  wire _n0023;
  wire \Ker15_SW2/O_pack_1 ;
  wire \vd<10>/DXMUX ;
  wire \_n0035<10>1/O ;
  wire \Ker0_SW2/O_pack_1 ;
  wire \vd<10>/SRINVNOT ;
  wire \vd<10>/CLKINV ;
  wire \vd<11>/DXMUX ;
  wire \_n0035<11>1/O ;
  wire \Ker0_SW4/O_pack_1 ;
  wire \vd<11>/SRINVNOT ;
  wire \vd<11>/CLKINV ;
  wire \vd<12>/DXMUX ;
  wire \_n0035<12>1/O ;
  wire \Ker0_SW6/O_pack_1 ;
  wire \vd<12>/SRINVNOT ;
  wire \vd<12>/CLKINV ;
  wire \vd<13>/DXMUX ;
  wire \_n0035<13>1/O ;
  wire \Ker0_SW30/O_pack_1 ;
  wire \vd<13>/SRINVNOT ;
  wire \vd<13>/CLKINV ;
  wire \vd<14>/DXMUX ;
  wire \_n0035<14>1/O ;
  wire \Ker0_SW28/O_pack_1 ;
  wire \vd<14>/SRINVNOT ;
  wire \vd<14>/CLKINV ;
  wire \vd<1>/DXMUX ;
  wire \_n0035<1>1/O ;
  wire \Ker0_SW10/O_pack_1 ;
  wire \vd<1>/SRINVNOT ;
  wire \vd<1>/CLKINV ;
  wire _n00482;
  wire N32_pack_1;
  wire \_n0042<4>/XORF ;
  wire \_n0042<4>/CYINIT ;
  wire \_n0042<4>/F ;
  wire \_n0042<4>/XORG ;
  wire \VSP2232__n0042<4>_cyo ;
  wire \_n0042<4>/CYSELF ;
  wire \_n0042<4>/CYMUXFAST ;
  wire \_n0042<4>/CYAND ;
  wire \_n0042<4>/FASTCARRY ;
  wire \_n0042<4>/CYMUXG2 ;
  wire \_n0042<4>/CYMUXF2 ;
  wire \_n0042<4>/LOGIC_ZERO ;
  wire \_n0042<4>/CYSELG ;
  wire \_n0042<4>/G ;
  wire \_n0042<6>/XORF ;
  wire \_n0042<6>/CYINIT ;
  wire \_n0042<6>/F ;
  wire \_n0042<6>/XORG ;
  wire \VSP2232__n0042<6>_cyo ;
  wire \_n0042<6>/CYSELF ;
  wire \_n0042<6>/CYMUXFAST ;
  wire \_n0042<6>/CYAND ;
  wire \_n0042<6>/FASTCARRY ;
  wire \_n0042<6>/CYMUXG2 ;
  wire \_n0042<6>/CYMUXF2 ;
  wire \_n0042<6>/LOGIC_ZERO ;
  wire \_n0042<6>/CYSELG ;
  wire \_n0042<6>/G ;
  wire \_n0042<8>/XORF ;
  wire \_n0042<8>/CYINIT ;
  wire \_n0042<8>/F ;
  wire \_n0042<8>/XORG ;
  wire \VSP2232__n0042<8>_cyo ;
  wire \_n0042<8>/CYSELF ;
  wire \_n0042<8>/CYMUXFAST ;
  wire \_n0042<8>/CYAND ;
  wire \_n0042<8>/FASTCARRY ;
  wire \_n0042<8>/CYMUXG2 ;
  wire \_n0042<8>/CYMUXF2 ;
  wire \_n0042<8>/LOGIC_ZERO ;
  wire \_n0042<8>/CYSELG ;
  wire \_n0042<8>/G ;
  wire \_n0042<10>/XORF ;
  wire \_n0042<10>/CYINIT ;
  wire \_n0042<10>/F ;
  wire \_n0042<10>/XORG ;
  wire \VSP2232__n0042<10>_cyo ;
  wire \_n0042<10>/CYSELF ;
  wire \_n0042<10>/CYMUXFAST ;
  wire \_n0042<10>/CYAND ;
  wire \_n0042<10>/FASTCARRY ;
  wire \_n0042<10>/CYMUXG2 ;
  wire \_n0042<10>/CYMUXF2 ;
  wire \_n0042<10>/LOGIC_ZERO ;
  wire \_n0042<10>/CYSELG ;
  wire \_n0042<10>/G ;
  wire \_n0042<12>/XORF ;
  wire \_n0042<12>/CYINIT ;
  wire \_n0042<12>/F ;
  wire \_n0042<12>/XORG ;
  wire \VSP2232__n0042<12>_cyo ;
  wire \_n0042<12>/CYSELF ;
  wire \_n0042<12>/CYMUXFAST ;
  wire \_n0042<12>/CYAND ;
  wire \_n0042<12>/FASTCARRY ;
  wire \_n0042<12>/CYMUXG2 ;
  wire \_n0042<12>/CYMUXF2 ;
  wire \_n0042<12>/LOGIC_ZERO ;
  wire \_n0042<12>/CYSELG ;
  wire \_n0042<12>/G ;
  wire \_n0042<14>/XORF ;
  wire \_n0042<14>/CYINIT ;
  wire \ve<14>_rt ;
  wire \clk/INBUF ;
  wire \clpob/ENABLE ;
  wire \clpob/O ;
  wire \shp/ENABLE ;
  wire \shp/O ;
  wire \adcck/ENABLE ;
  wire \adcck/O ;
  wire \adcck/OUTPUT/OTCLK1INV ;
  wire \shd/ENABLE ;
  wire \shd/O ;
  wire \clpdm/ENABLE ;
  wire \clpdm/O ;
  wire \clpdm/OUTPUT/OTCLK1INV ;
  wire \rst/INBUF ;
  wire \_n0041<2>/XORF ;
  wire \_n0041<2>/CYINIT ;
  wire \_n0041<2>/F ;
  wire \_n0041<2>/XORG ;
  wire \VSP2232__n0041<2>_cyo ;
  wire \_n0041<2>/CYSELF ;
  wire \_n0041<2>/CYMUXFAST ;
  wire \_n0041<2>/CYAND ;
  wire \_n0041<2>/FASTCARRY ;
  wire \_n0041<2>/CYMUXG2 ;
  wire \_n0041<2>/CYMUXF2 ;
  wire \_n0041<2>/LOGIC_ZERO ;
  wire \_n0041<2>/CYSELG ;
  wire \_n0041<2>/G ;
  wire \_n0041<4>/XORF ;
  wire \_n0041<4>/CYINIT ;
  wire \_n0041<4>/F ;
  wire \_n0041<4>/XORG ;
  wire \VSP2232__n0041<4>_cyo ;
  wire \_n0041<4>/CYSELF ;
  wire \_n0041<4>/CYMUXFAST ;
  wire \_n0041<4>/CYAND ;
  wire \_n0041<4>/FASTCARRY ;
  wire \_n0041<4>/CYMUXG2 ;
  wire \_n0041<4>/CYMUXF2 ;
  wire \_n0041<4>/LOGIC_ZERO ;
  wire \_n0041<4>/CYSELG ;
  wire \_n0041<4>/G ;
  wire \_n0041<6>/XORF ;
  wire \_n0041<6>/CYINIT ;
  wire \_n0041<6>/F ;
  wire \_n0041<6>/XORG ;
  wire \VSP2232__n0041<6>_cyo ;
  wire \_n0041<6>/CYSELF ;
  wire \_n0041<6>/CYMUXFAST ;
  wire \_n0041<6>/CYAND ;
  wire \_n0041<6>/FASTCARRY ;
  wire \_n0041<6>/CYMUXG2 ;
  wire \_n0041<6>/CYMUXF2 ;
  wire \_n0041<6>/LOGIC_ZERO ;
  wire \_n0041<6>/CYSELG ;
  wire \_n0041<6>/G ;
  wire \_n0041<8>/XORF ;
  wire \_n0041<8>/CYINIT ;
  wire \_n0041<8>/F ;
  wire \_n0041<8>/XORG ;
  wire \VSP2232__n0041<8>_cyo ;
  wire \_n0041<8>/CYSELF ;
  wire \_n0041<8>/CYMUXFAST ;
  wire \_n0041<8>/CYAND ;
  wire \_n0041<8>/FASTCARRY ;
  wire \_n0041<8>/CYMUXG2 ;
  wire \_n0041<8>/CYMUXF2 ;
  wire \_n0041<8>/LOGIC_ZERO ;
  wire \_n0041<8>/CYSELG ;
  wire \_n0041<8>/G ;
  wire \_n0041<10>/XORF ;
  wire \_n0041<10>/CYINIT ;