shuju.twr

SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序

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Release 7.1.04i Trace H.42
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

D:/Xilinx/bin/nt/trce.exe -ise d:\test\icx229al\ICX229AL.ise -intstyle ise -e 3
-l 3 -s 4 -xml shuju shuju.ncd -o shuju.twr shuju.pcf


Design file:              shuju.ncd
Physical constraint file: shuju.pcf
Device,speed:             xc3s400,-4 (PRODUCTION 1.37 2005-07-22)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
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INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock sclk
------------+------------+------------+------------------+--------+
            |  Setup to  |  Hold to   |                  |  Clock |
Source      | clk (edge) | clk (edge) |Internal Clock(s) |  Phase |
------------+------------+------------+------------------+--------+
rst         |    4.784(F)|    0.134(F)|sclk_BUFGP        |   0.000|
------------+------------+------------+------------------+--------+

Clock sclk to Pad
------------+------------+------------------+--------+
            | clk (edge) |                  |  Clock |
Destination | to PAD     |Internal Clock(s) |  Phase |
------------+------------+------------------+--------+
count<0>    |   10.796(F)|sclk_BUFGP        |   0.000|
count<1>    |   10.284(F)|sclk_BUFGP        |   0.000|
count<2>    |   10.633(F)|sclk_BUFGP        |   0.000|
count<3>    |    9.828(F)|sclk_BUFGP        |   0.000|
count<4>    |   10.277(F)|sclk_BUFGP        |   0.000|
datain<10>  |    9.303(F)|sclk_BUFGP        |   0.000|
datain<11>  |    9.251(F)|sclk_BUFGP        |   0.000|
datain<12>  |   10.359(F)|sclk_BUFGP        |   0.000|
datain<13>  |    9.457(F)|sclk_BUFGP        |   0.000|
datain<14>  |    9.903(F)|sclk_BUFGP        |   0.000|
datain<15>  |    9.468(F)|sclk_BUFGP        |   0.000|
datain<3>   |   10.401(F)|sclk_BUFGP        |   0.000|
datain<4>   |   10.648(F)|sclk_BUFGP        |   0.000|
datain<5>   |    9.790(F)|sclk_BUFGP        |   0.000|
datain<6>   |    9.859(F)|sclk_BUFGP        |   0.000|
datain<7>   |   10.636(F)|sclk_BUFGP        |   0.000|
datain<8>   |   10.440(F)|sclk_BUFGP        |   0.000|
datain<9>   |    9.284(F)|sclk_BUFGP        |   0.000|
sdata       |   10.216(F)|sclk_BUFGP        |   0.000|
zhuangtai<0>|   10.615(F)|sclk_BUFGP        |   0.000|
zhuangtai<1>|   10.900(F)|sclk_BUFGP        |   0.000|
------------+------------+------------------+--------+

Clock to Setup on destination clock sclk
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
sclk           |         |         |         |    6.998|
---------------+---------+---------+---------+---------+

Analysis completed Tue Jan 15 12:22:49 2008
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Peak Memory Usage: 85 MB