my.xst

TMS3205402Verilog HDL源码

set -tmpdir __projnav
set -xsthdpdir ./xst
run
-ifn my.prj
-ifmt mixed
-ofn my
-ofmt NGC
-p xc9500xl
-top my
-opt_mode Speed
-opt_level 1
-iuc NO
-lso my.lso
-keep_hierarchy YES
-rtlview Yes
-hierarchy_separator /
-bus_delimiter <>
-case maintain
-verilog2001 YES
-fsm_extract YES -fsm_encoding Auto
-safe_implementation No
-mux_extract YES
-resource_sharing YES
-iobuf YES
-equivalent_register_removal YES
-pld_mp YES
-pld_xp YES
-pld_ce YES
-wysiwyg NO