cre_comp.do

VHDL版的C8051核(C8051).evatronix公司的IP核

# ******************************************************************* #
# Copyright (c) 1999-2001  Evatronix SA
# ******************************************************************* #
# Please review the terms of the license agreement before using
# this file. If you are not an authorized user, please destroy this
# source code file and notify Evatronix SA immediately that you
# inadvertently received an unauthorized copy.
# ******************************************************************* #
# ------------------------------------------------------------------- #
# Project name         : C8051
# Project description  : C8051 Microcontroller Unit#
# File name            : CRE_COMP.DO
# File contents        : Sample macro for ALDEC ActiveVHDL 
# Purpose              : Creation design for C8051 test bench
# Design Engineer      : D.K.
# Quality Engineer     : M.B.
# Test version         : 3.01
# Last modification    : 2001-10-01
# ------------------------------------------------------------------- #

@transcript off

set DIR D:\Designs\C8051\VER_301
set directory C8051_301E00

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# ------------------------------------------------------------------- #
# Creating design C8051
# ------------------------------------------------------------------- #
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createdesign $directory $DIR

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# ------------------------------------------------------------------- #
# Opening design C8051
# ------------------------------------------------------------------- #
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cd $DIR\$directory
opendesign $directory

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# ------------------------------------------------------------------- #
# Creating destination library for core of model
# ------------------------------------------------------------------- #
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vmap C8051_LIB $DSN

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# ------------------------------------------------------------------- #
# Adding utility packages
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\CORE\UTILITY.VHD

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# ------------------------------------------------------------------- #
# Adding components of core
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\CORE\ALU.VHD
addfile -vhdl $DSN\SRC\CORE\CLKCTRL.VHD
addfile -vhdl $DSN\SRC\CORE\CPU.VHD
addfile -vhdl $DSN\SRC\CORE\ISR.VHD
addfile -vhdl $DSN\SRC\CORE\MEMCTRL.VHD
addfile -vhdl $DSN\SRC\CORE\OCI.VHD
addfile -vhdl $DSN\SRC\CORE\PORTS.VHD
addfile -vhdl $DSN\SRC\CORE\RAMSFRCTRL.VHD
addfile -vhdl $DSN\SRC\CORE\SERIAL.VHD
addfile -vhdl $DSN\SRC\CORE\TIMER.VHD
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# ------------------------------------------------------------------- #
# Adding core
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\CORE\C8051.VHD
addfile -vhdl $DSN\SRC\CORE\C8051_CFG.VHD
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# ------------------------------------------------------------------- #
# Adding components of sample unit
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\TB\CHIP\CHIPOCI.VHD
addfile -vhdl $DSN\SRC\TB\CHIP\CHIPPAD.VHD
addfile -vhdl $DSN\SRC\TB\CHIP\CHIPRAM.VHD
addfile -vhdl $DSN\SRC\TB\CHIP\CHIPROM.VHD
addfile -vhdl $DSN\SRC\TB\CHIP\CHIPSFR.VHD
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# ------------------------------------------------------------------- #
# Adding sample unit
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\TB\CHIP\CHIP8051.VHD
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# ------------------------------------------------------------------- #
# Adding components of Test Bench
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\TB\ENV\EXTACS.VHD
addfile -vhdl $DSN\SRC\TB\ENV\EXTCLOCK.VHD	 
addfile -vhdl $DSN\SRC\TB\ENV\EXTLATCH.VHD
addfile -vhdl $DSN\SRC\TB\ENV\EXTCOMP.VHD
addfile -vhdl $DSN\SRC\TB\ENV\EXTRAM.VHD
addfile -vhdl $DSN\SRC\TB\ENV\EXTROM.VHD
addfile -vhdl $DSN\SRC\TB\ENV\EXTSHIFT.VHD
addfile -vhdl $DSN\SRC\TB\ENV\EXTSTIM.VHD
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# ------------------------------------------------------------------- #
# Adding Test Bench
# ------------------------------------------------------------------- #
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addfile -vhdl $DSN\SRC\TB\TB.VHD
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# ******************************************************************* #
# Compiler section
# ******************************************************************* #

# ------------------------------------------------------------------- #
# Compiling utility packages
# ------------------------------------------------------------------- #
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cd $DSN\SRC\CORE
vcom -87 -work C8051_LIB UTILITY.VHD
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# ------------------------------------------------------------------- #
# Compiling components of core
# ------------------------------------------------------------------- #
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cd $DSN\SRC\CORE
vcom -87 -work C8051_LIB ALU.VHD
vcom -87 -work C8051_LIB CLKCTRL.VHD
vcom -87 -work C8051_LIB CPU.VHD
vcom -87 -work C8051_LIB ISR.VHD
vcom -87 -work C8051_LIB MEMCTRL.VHD
vcom -87 -work C8051_LIB OCI.VHD
vcom -87 -work C8051_LIB PORTS.VHD
vcom -87 -work C8051_LIB RAMSFRCTRL.VHD
vcom -87 -work C8051_LIB SERIAL.VHD
vcom -87 -work C8051_LIB TIMER.VHD
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# ------------------------------------------------------------------- #
# Compiling core
# ------------------------------------------------------------------- #
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cd $DSN\SRC\CORE
vcom -87 -work C8051_LIB C8051.VHD
vcom -87 -work C8051_LIB C8051_CFG.VHD
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# ------------------------------------------------------------------- #
# Compiling components of sample unit
# ------------------------------------------------------------------- #
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cd $DSN\SRC\TB\CHIP
vcom -87 -work C8051_LIB CHIPOCI.VHD
vcom -87 -work C8051_LIB CHIPPAD.VHD
vcom -87 -work C8051_LIB CHIPRAM.VHD
vcom -87 -work C8051_LIB CHIPROM.VHD
vcom -87 -work C8051_LIB CHIPSFR.VHD
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# ------------------------------------------------------------------- #
# Compiling sample unit
# ------------------------------------------------------------------- #
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cd $DSN\SRC\TB\CHIP
vcom -87 -work C8051_LIB CHIP8051.VHD
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# ------------------------------------------------------------------- #
# Compiling components of Test Bench
# ------------------------------------------------------------------- #
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cd $DSN\SRC\TB\ENV
vcom -87 -work C8051_LIB EXTACS.VHD
vcom -87 -work C8051_LIB EXTCLOCK.VHD
vcom -87 -work C8051_LIB EXTLATCH.VHD
vcom -87 -work C8051_LIB EXTCOMP.VHD
vcom -87 -work C8051_LIB EXTRAM.VHD
vcom -87 -work C8051_LIB EXTROM.VHD
vcom -87 -work C8051_LIB EXTSHIFT.VHD
vcom -87 -work C8051_LIB EXTSTIM.VHD
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# ------------------------------------------------------------------- #
# Compiling Test Bench
# ------------------------------------------------------------------- #
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cd $DSN\SRC\TB
vcom -87 -work C8051_LIB TB.VHD
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# ------------------------------------------------------------------- #
# Seting configuration as the top-level design unit
# ------------------------------------------------------------------- #

configuration TYPICAL_C8051_EXTRAM_EXTROM

# ------------------------------------------------------------------- #
# Adding Macros
# ------------------------------------------------------------------- #
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addfile -do $DSN\TOOLS\ALDEC\MACROS\OP_TESTS.DO
addfile -do $DSN\TOOLS\ALDEC\MACROS\PE_TESTS.DO
addfile -do $DSN\TOOLS\ALDEC\MACROS\PE_TESTS_25.DO
addfile -do $DSN\TOOLS\ALDEC\MACROS\EX_TESTS.DO
addfile -do $DSN\TOOLS\ALDEC\MACROS\ADD_WAVE.DO
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# ******************************************************************* #