de2_ccd_pip.fit.summary

altera de2 开发板 vga lcd控制quatus 工程

Fitter Status : Successful - Wed Jan 31 11:02:36 2007
Quartus II Version : 6.1 Build 201 11/27/2006 SJ Full Version
Revision Name : DE2_CCD_PIP
Top-level Entity Name : DE2_CCD_PIP
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 2,430 / 33,216 ( 7 % )
    Total combinational functions : 1,937 / 33,216 ( 6 % )
    Dedicated logic registers : 1,641 / 33,216 ( 5 % )
Total registers : 1665
Total pins : 425 / 475 ( 89 % )
Total virtual pins : 0
Total memory bits : 141,360 / 483,840 ( 29 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 2 / 4 ( 50 % )