prev_cmp_de2_ccd_pip.map.qmsg

altera de2 开发板 vga lcd控制quatus 工程

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Elaboration Quartus II " "Info: Running Quartus II Analysis & Elaboration" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Sep 01 15:15:06 2008 " "Info: Processing started: Mon Sep 01 15:15:06 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off DE2_CCD_PIP -c DE2_CCD_PIP --analysis_and_elaboration " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DE2_CCD_PIP -c DE2_CCD_PIP --analysis_and_elaboration" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/command.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/command.v" { { "Info" "ISGN_ENTITY_NAME" "1 command " "Info: Found entity 1: command" {  } { { "Sdram_Control_8Port/command.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/command.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/control_interface.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/control_interface.v" { { "Info" "ISGN_ENTITY_NAME" "1 control_interface " "Info: Found entity 1: control_interface" {  } { { "Sdram_Control_8Port/control_interface.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/control_interface.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "1 sdr_data_path.v(26) " "Warning (10229): Verilog HDL Expression warning at sdr_data_path.v(26): truncated literal to match 1 bits" {  } { { "Sdram_Control_8Port/sdr_data_path.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/sdr_data_path.v" 26 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/sdr_data_path.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/sdr_data_path.v" { { "Info" "ISGN_ENTITY_NAME" "1 sdr_data_path " "Info: Found entity 1: sdr_data_path" {  } { { "Sdram_Control_8Port/sdr_data_path.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/sdr_data_path.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/Sdram_Control_8Port.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/Sdram_Control_8Port.v" { { "Info" "ISGN_ENTITY_NAME" "1 Sdram_Control_8Port " "Info: Found entity 1: Sdram_Control_8Port" {  } { { "Sdram_Control_8Port/Sdram_Control_8Port.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/Sdram_Control_8Port.v" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/Sdram_FIFO.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/Sdram_FIFO.v" { { "Info" "ISGN_ENTITY_NAME" "1 Sdram_FIFO " "Info: Found entity 1: Sdram_FIFO" {  } { { "Sdram_Control_8Port/Sdram_FIFO.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/Sdram_FIFO.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/Sdram_PLL.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/Sdram_PLL.v" { { "Info" "ISGN_ENTITY_NAME" "1 Sdram_PLL " "Info: Found entity 1: Sdram_PLL" {  } { { "Sdram_Control_8Port/Sdram_PLL.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/Sdram_PLL.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/Sdram_RD_FIFO.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/Sdram_RD_FIFO.v" { { "Info" "ISGN_ENTITY_NAME" "1 Sdram_RD_FIFO " "Info: Found entity 1: Sdram_RD_FIFO" {  } { { "Sdram_Control_8Port/Sdram_RD_FIFO.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/Sdram_RD_FIFO.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Sdram_Control_8Port/Sdram_WR_FIFO.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Sdram_Control_8Port/Sdram_WR_FIFO.v" { { "Info" "ISGN_ENTITY_NAME" "1 Sdram_WR_FIFO " "Info: Found entity 1: Sdram_WR_FIFO" {  } { { "Sdram_Control_8Port/Sdram_WR_FIFO.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Sdram_Control_8Port/Sdram_WR_FIFO.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "CCD_Capture.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file CCD_Capture.v" { { "Info" "ISGN_ENTITY_NAME" "1 CCD_Capture " "Info: Found entity 1: CCD_Capture" {  } { { "CCD_Capture.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/CCD_Capture.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DE2_CCD_PIP.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file DE2_CCD_PIP.v" { { "Info" "ISGN_ENTITY_NAME" "1 DE2_CCD_PIP " "Info: Found entity 1: DE2_CCD_PIP" {  } { { "DE2_CCD_PIP.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/DE2_CCD_PIP.v" 45 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "I2C_AV_Config.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file I2C_AV_Config.v" { { "Info" "ISGN_ENTITY_NAME" "1 I2C_AV_Config " "Info: Found entity 1: I2C_AV_Config" {  } { { "I2C_AV_Config.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/I2C_AV_Config.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "I2C_CCD_Config.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file I2C_CCD_Config.v" { { "Info" "ISGN_ENTITY_NAME" "1 I2C_CCD_Config " "Info: Found entity 1: I2C_CCD_Config" {  } { { "I2C_CCD_Config.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/I2C_CCD_Config.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "I2C_Controller.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file I2C_Controller.v" { { "Info" "ISGN_ENTITY_NAME" "1 I2C_Controller " "Info: Found entity 1: I2C_Controller" {  } { { "I2C_Controller.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/I2C_Controller.v" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "I2S_Controller.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file I2S_Controller.v" { { "Info" "ISGN_ENTITY_NAME" "1 I2S_Controller " "Info: Found entity 1: I2S_Controller" {  } { { "I2S_Controller.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/I2S_Controller.v" 43 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "I2S_LCM_Config.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file I2S_LCM_Config.v" { { "Info" "ISGN_ENTITY_NAME" "1 I2S_LCM_Config " "Info: Found entity 1: I2S_LCM_Config" {  } { { "I2S_LCM_Config.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/I2S_LCM_Config.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "LCM_Controller.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file LCM_Controller.v" { { "Info" "ISGN_ENTITY_NAME" "1 LCM_Controller " "Info: Found entity 1: LCM_Controller" {  } { { "LCM_Controller.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/LCM_Controller.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "LCM_PLL.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file LCM_PLL.v" { { "Info" "ISGN_ENTITY_NAME" "1 LCM_PLL " "Info: Found entity 1: LCM_PLL" {  } { { "LCM_PLL.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/LCM_PLL.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Line_Buffer.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Line_Buffer.v" { { "Info" "ISGN_ENTITY_NAME" "1 Line_Buffer " "Info: Found entity 1: Line_Buffer" {  } { { "Line_Buffer.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Line_Buffer.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Mirror_Col_2X.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Mirror_Col_2X.v" { { "Info" "ISGN_ENTITY_NAME" "1 Mirror_Col_2X " "Info: Found entity 1: Mirror_Col_2X" {  } { { "Mirror_Col_2X.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Mirror_Col_2X.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Mirror_Col_4X.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Mirror_Col_4X.v" { { "Info" "ISGN_ENTITY_NAME" "1 Mirror_Col_4X " "Info: Found entity 1: Mirror_Col_4X" {  } { { "Mirror_Col_4X.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Mirror_Col_4X.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "RAW2RGB_2X.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file RAW2RGB_2X.v" { { "Info" "ISGN_ENTITY_NAME" "1 RAW2RGB_2X " "Info: Found entity 1: RAW2RGB_2X" {  } { { "RAW2RGB_2X.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/RAW2RGB_2X.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "RAW2RGB_4X.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file RAW2RGB_4X.v" { { "Info" "ISGN_ENTITY_NAME" "1 RAW2RGB_4X " "Info: Found entity 1: RAW2RGB_4X" {  } { { "RAW2RGB_4X.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/RAW2RGB_4X.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Reset_Delay.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Reset_Delay.v" { { "Info" "ISGN_ENTITY_NAME" "1 Reset_Delay " "Info: Found entity 1: Reset_Delay" {  } { { "Reset_Delay.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Reset_Delay.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "SEG7_LUT.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file SEG7_LUT.v" { { "Info" "ISGN_ENTITY_NAME" "1 SEG7_LUT " "Info: Found entity 1: SEG7_LUT" {  } { { "SEG7_LUT.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/SEG7_LUT.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "SEG7_LUT_8.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file SEG7_LUT_8.v" { { "Info" "ISGN_ENTITY_NAME" "1 SEG7_LUT_8 " "Info: Found entity 1: SEG7_LUT_8" {  } { { "SEG7_LUT_8.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/SEG7_LUT_8.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Stack_2X_RAM.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Stack_2X_RAM.v" { { "Info" "ISGN_ENTITY_NAME" "1 Stack_2X_RAM " "Info: Found entity 1: Stack_2X_RAM" {  } { { "Stack_2X_RAM.v" "" { Text "F:/development board/台湾开发板，vga，视频等/DE2/DE2_with_VGA_LCM/DE2_CCD_VGA_LCM/Stack_2X_RAM.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}