de2_ccd_pip.map.rpt

altera de2 开发板 vga lcd控制quatus 工程

Analysis & Elaboration report for DE2_CCD_PIP
Mon Sep 01 15:15:34 2008
Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Elaboration Summary
  3. Source assignments for RAW2RGB_2X:u4|Line_Buffer:u0|altshift_taps:altshift_taps_component|shift_taps_gkn:auto_generated|altsyncram_4m81:altsyncram2
  4. Source assignments for RAW2RGB_4X:v4|Line_Buffer:u0|altshift_taps:altshift_taps_component|shift_taps_gkn:auto_generated|altsyncram_4m81:altsyncram2
  5. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component
  6. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
  7. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
  8. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
  9. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
 10. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
 11. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
 12. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
 13. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp
 14. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 15. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe7
 16. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_brp
 17. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_bwp
 18. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 19. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe10
 20. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component
 21. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
 22. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
 23. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
 24. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
 25. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
 26. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
 27. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
 28. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp
 29. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 30. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe7
 31. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_brp
 32. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_bwp
 33. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 34. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe10
 35. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component
 36. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
 37. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
 38. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
 39. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
 40. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
 41. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
 42. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
 43. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp
 44. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 45. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe7
 46. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_brp
 47. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_bwp
 48. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 49. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe10
 50. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component
 51. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
 52. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
 53. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
 54. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
 55. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
 56. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
 57. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
 58. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp
 59. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 60. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe7
 61. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_brp
 62. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_bwp
 63. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 64. Source assignments for Sdram_Control_8Port:u6|Sdram_WR_FIFO:write_fifo4|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe10
 65. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component
 66. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
 67. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
 68. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
 69. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
 70. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
 71. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
 72. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
 73. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp
 74. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 75. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe7
 76. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_brp
 77. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_bwp
 78. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 79. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe10
 80. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component
 81. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
 82. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
 83. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
 84. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
 85. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
 86. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
 87. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
 88. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp
 89. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 90. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe7
 91. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_brp
 92. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:ws_bwp
 93. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 94. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe10
 95. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component
 96. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated
 97. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_fgc:wrptr_g1p
 98. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|a_graycounter_egc:wrptr_gp
 99. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram
100. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|altsyncram_3731:fifo_ram|altsyncram_drg1:altsyncram3
101. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_mcc:rdaclr
102. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_brp
103. Source assignments for Sdram_Control_8Port:u6|Sdram_RD_FIFO:read_fifo3|dcfifo:dcfifo_component|dcfifo_qlk1:auto_generated|dffpipe_oe9:rs_bwp