📄 zhuzimiaobiao.rpt
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-- Node name is '|MUX24:5|:230'
-- Equation name is '_LC2_C1', type is buried
_LC2_C1 = LCELL( _EQ070);
_EQ070 = !_LC1_C19 & _LC6_C1
# _LC1_C19 & _LC5_C33;
-- Node name is '|MUX24:5|:239'
-- Equation name is '_LC1_A19', type is buried
!_LC1_A19 = _LC1_A19~NOT;
_LC1_A19~NOT = LCELL( _EQ071);
_EQ071 = !_LC4_A21 & !_LC4_C27 & _LC5_C30
# !_LC4_A21 & _LC5_C30 & !_LC8_A19
# _LC4_C27 & !_LC8_A19;
-- Node name is '|MUX24:5|:242'
-- Equation name is '_LC2_C25', type is buried
!_LC2_C25 = _LC2_C25~NOT;
_LC2_C25~NOT = LCELL( _EQ072);
_EQ072 = !_LC1_A19 & !_LC4_C25
# !_LC1_A19 & !_LC1_C21
# !_LC1_C21 & _LC4_C25;
-- Node name is '|MUX24:5|:245'
-- Equation name is '_LC3_C24', type is buried
!_LC3_C24 = _LC3_C24~NOT;
_LC3_C24~NOT = LCELL( _EQ073);
_EQ073 = !_LC2_C23 & !_LC2_C25
# !_LC2_C25 & !_LC8_C24
# _LC2_C23 & !_LC8_C24;
-- Node name is '|MUX24:5|:248'
-- Equation name is '_LC3_C34', type is buried
!_LC3_C34 = _LC3_C34~NOT;
_LC3_C34~NOT = LCELL( _EQ074);
_EQ074 = !_LC1_C22 & !_LC3_C24
# !_LC3_C24 & !_LC4_C34
# _LC1_C22 & !_LC4_C34;
-- Node name is '|MUX24:5|:251'
-- Equation name is '_LC4_C33', type is buried
!_LC4_C33 = _LC4_C33~NOT;
_LC4_C33~NOT = LCELL( _EQ075);
_EQ075 = !_LC1_C19 & !_LC3_C34
# !_LC3_C34 & !_LC8_C33
# _LC1_C19 & !_LC8_C33;
-- Node name is '|MUX24:5|:260'
-- Equation name is '_LC6_A19', type is buried
!_LC6_A19 = _LC6_A19~NOT;
_LC6_A19~NOT = LCELL( _EQ076);
_EQ076 = !_LC2_A21 & !_LC4_C27 & _LC5_C30
# !_LC2_A21 & _LC5_C30 & !_LC7_A19
# _LC4_C27 & !_LC7_A19;
-- Node name is '|MUX24:5|:263'
-- Equation name is '_LC1_C25', type is buried
!_LC1_C25 = _LC1_C25~NOT;
_LC1_C25~NOT = LCELL( _EQ077);
_EQ077 = !_LC4_C25 & !_LC6_A19
# !_LC6_A19 & !_LC8_C21
# _LC4_C25 & !_LC8_C21;
-- Node name is '|MUX24:5|:266'
-- Equation name is '_LC4_C24', type is buried
!_LC4_C24 = _LC4_C24~NOT;
_LC4_C24~NOT = LCELL( _EQ078);
_EQ078 = !_LC1_C25 & !_LC2_C23
# !_LC1_C25 & !_LC7_C24
# _LC2_C23 & !_LC7_C24;
-- Node name is '|MUX24:5|:269'
-- Equation name is '_LC3_C19', type is buried
!_LC3_C19 = _LC3_C19~NOT;
_LC3_C19~NOT = LCELL( _EQ079);
_EQ079 = !_LC1_C22 & !_LC4_C24
# !_LC1_C31 & !_LC4_C24
# _LC1_C22 & !_LC1_C31;
-- Node name is '|MUX24:5|:272'
-- Equation name is '_LC2_C19', type is buried
!_LC2_C19 = _LC2_C19~NOT;
_LC2_C19~NOT = LCELL( _EQ080);
_EQ080 = !_LC1_C19 & !_LC3_C19
# !_LC3_C19 & !_LC3_C33
# _LC1_C19 & !_LC3_C33;
-- Node name is '|MUX24:5|:281'
-- Equation name is '_LC1_C30', type is buried
!_LC1_C30 = _LC1_C30~NOT;
_LC1_C30~NOT = LCELL( _EQ081);
_EQ081 = !_LC3_A21 & !_LC4_C27 & _LC5_C30
# !_LC3_A21 & !_LC4_A19 & _LC5_C30
# !_LC4_A19 & _LC4_C27;
-- Node name is '|MUX24:5|:284'
-- Equation name is '_LC6_C34', type is buried
!_LC6_C34 = _LC6_C34~NOT;
_LC6_C34~NOT = LCELL( _EQ082);
_EQ082 = !_LC1_C30 & !_LC4_C25
# !_LC1_C30 & !_LC2_C21
# !_LC2_C21 & _LC4_C25;
-- Node name is '|MUX24:5|:287'
-- Equation name is '_LC7_C34', type is buried
!_LC7_C34 = _LC7_C34~NOT;
_LC7_C34~NOT = LCELL( _EQ083);
_EQ083 = !_LC2_C23 & !_LC6_C34
# !_LC2_C24 & !_LC6_C34
# _LC2_C23 & !_LC2_C24;
-- Node name is '|MUX24:5|:290'
-- Equation name is '_LC1_C34', type is buried
!_LC1_C34 = _LC1_C34~NOT;
_LC1_C34~NOT = LCELL( _EQ084);
_EQ084 = !_LC1_C22 & !_LC7_C34
# !_LC7_C34 & !_LC8_C34
# _LC1_C22 & !_LC8_C34;
-- Node name is '|MUX24:5|:293'
-- Equation name is '_LC2_C33', type is buried
!_LC2_C33 = _LC2_C33~NOT;
_LC2_C33~NOT = LCELL( _EQ085);
_EQ085 = !_LC1_C19 & !_LC1_C34
# !_LC1_C34 & !_LC7_C33
# _LC1_C19 & !_LC7_C33;
-- Node name is '|SCAN:4|:149'
-- Equation name is '_LC5_C30', type is buried
!_LC5_C30 = _LC5_C30~NOT;
_LC5_C30~NOT = LCELL( _EQ086);
_EQ086 = !_LC2_C30
# !_LC3_C30
# !_LC4_C30;
-- Node name is '|SCAN:4|:159'
-- Equation name is '_LC4_C27', type is buried
!_LC4_C27 = _LC4_C27~NOT;
_LC4_C27~NOT = LCELL( _EQ087);
_EQ087 = _LC2_C30
# !_LC3_C30
# !_LC4_C30;
-- Node name is '|SCAN:4|:169'
-- Equation name is '_LC4_C25', type is buried
!_LC4_C25 = _LC4_C25~NOT;
_LC4_C25~NOT = LCELL( _EQ088);
_EQ088 = _LC2_C30
# _LC3_C30
# !_LC4_C30;
-- Node name is '|SCAN:4|:179'
-- Equation name is '_LC2_C23', type is buried
!_LC2_C23 = _LC2_C23~NOT;
_LC2_C23~NOT = LCELL( _EQ089);
_EQ089 = !_LC2_C30
# !_LC3_C30
# _LC4_C30;
-- Node name is '|SCAN:4|:189'
-- Equation name is '_LC1_C22', type is buried
!_LC1_C22 = _LC1_C22~NOT;
_LC1_C22~NOT = LCELL( _EQ090);
_EQ090 = _LC2_C30
# !_LC3_C30
# _LC4_C30;
-- Node name is '|SCAN:4|:199'
-- Equation name is '_LC1_C19', type is buried
!_LC1_C19 = _LC1_C19~NOT;
_LC1_C19~NOT = LCELL( _EQ091);
_EQ091 = _LC2_C30
# _LC3_C30
# _LC4_C30;
-- Node name is '|SEL:31|:7' = '|SEL:31|cnt0'
-- Equation name is '_LC3_C30', type is buried
_LC3_C30 = DFFE(!_LC3_C30, GLOBAL( clk), VCC, VCC, VCC);
-- Node name is '|SEL:31|:6' = '|SEL:31|cnt1'
-- Equation name is '_LC2_C30', type is buried
_LC2_C30 = DFFE( _EQ092, GLOBAL( clk), VCC, VCC, VCC);
_EQ092 = _LC2_C30 & !_LC3_C30
# !_LC2_C30 & _LC3_C30;
-- Node name is '|SEL:31|:5' = '|SEL:31|cnt2'
-- Equation name is '_LC4_C30', type is buried
_LC4_C30 = DFFE( _EQ093, GLOBAL( clk), VCC, VCC, VCC);
_EQ093 = !_LC2_C30 & _LC4_C30
# !_LC3_C30 & _LC4_C30
# _LC2_C30 & _LC3_C30 & !_LC4_C30;
Project Information i:\miaobiao\zhuzimiaobiao.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'ACEX1K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:01
Partitioner 00:00:00
Fitter 00:00:01
Timing SNF Extractor 00:00:01
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:03
Memory Allocated
-----------------
Peak memory allocated during compilation = 24,217K
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