security.rmh

和picoblaze完全兼容的mcu ip core

// #33: ; Copyright Xilinx, Inc. 2006.   This code may be contain portions patented by other
// #34: ; third parties.  By providing this core as one possible implementation of a standard,
// #35: ; Xilinx is making no representation that the provided implementation of this standard
// #36: ; is free from any claims of infringement by any third party.  Xilinx expressly
// #37: ; disclaims any warranty with respect to the adequacy of the implementation, including
// #38: ; but not limited to any warranty or representation that the implementation is free
// #39: ; from claims of any third party.  Furthermore, Xilinx is providing this core as a
// #40: ; courtesy to you and suggests that you contact all third parties to obtain the
// #41: ; necessary rights to use this implementation.
// #42: ;
// #43: ;
// #44: ;**************************************************************************************
// #45: ; Port definitions
// #46: ;**************************************************************************************
// #47: ;
// #48: ;
// #49: ; UART ports
// #50: ;
// #51: ; Connection to PC to allow display of progress information and to operate simple
// #52: ; menu of commands.
// #53: ;
// #54: CONSTANT(status_port,0) ;UART and memory status
// #55: CONSTANT(tx_half_full,1) ;  Transmitter     half full - bit0
// #56: CONSTANT(tx_full,2) ;    FIFO            tx_full - bit1
// #57: CONSTANT(rx_data_present,4) ;  Receiver     data present - bit2
// #58: CONSTANT(rx_half_full,8) ;    FIFO          half full - bit3
// #59: CONSTANT(rx_full,16) ;                    rx_full - bit4
// #60: CONSTANT(spare1,32) ;                  spare '0' - bit5
// #61: CONSTANT(spare2,64) ;                  spare '0' - bit6
// #62: CONSTANT(strataflash_sts,128) ;  StrataFLASH           STS - bit7
// #63: ;
// #64: CONSTANT(UART_read_port,1) ;UART Rx data input
// #65: ;
// #66: CONSTANT(UART_write_port,8) ;UART Tx data output
// #67: ;
// #68: ;
// #69: ; LCD Display
// #70: ;
// #71: ;The master enable signal is not used by the LCD display itself
// #72: ;but is used to prevent any contention with the StrataFLASH memory that
// #73: ;is connected to the same data pins. In this design the StrataFLASH memory is
// #74: ;used in 8-bit mode so not contention should exist but this master enable
// #75: ;facilty is then available for anyone wanting to modify the design for use
// #76: ;with a 16-bit interface.
// #77: ;
// #78: CONSTANT(LCD_output_port,32) ;LCD character module output data and control
// #79: CONSTANT(LCD_E,1) ;   active High Enable        E - bit0
// #80: CONSTANT(LCD_RW,2) ;   Read=1 Write=0           RW - bit1
// #81: CONSTANT(LCD_RS,4) ;   Instruction=0 Data=1     RS - bit2
// #82: CONSTANT(LCD_drive,8) ;   Master enable (active High) - bit3
// #83: CONSTANT(LCD_DB4,16) ;   4-bit              Data DB4 - bit4
// #84: CONSTANT(LCD_DB5,32) ;   interface          Data DB5 - bit5
// #85: CONSTANT(LCD_DB6,64) ;                      Data DB6 - bit6
// #86: CONSTANT(LCD_DB7,128) ;                      Data DB7 - bit7
// #87: ;
// #88: ;
// #89: CONSTANT(LCD_input_port,3) ;LCD character module input data
// #90: CONSTANT(LCD_read_spare0,1) ;    Spare bits               - bit0
// #91: CONSTANT(LCD_read_spare1,2) ;    are zero                 - bit1
// #92: CONSTANT(LCD_read_spare2,4) ;                             - bit2
// #93: CONSTANT(LCD_read_spare3,8) ;                             - bit3
// #94: CONSTANT(LCD_read_DB4,16) ;    4-bit           Data DB4 - bit4
// #95: CONSTANT(LCD_read_DB5,32) ;    interface       Data DB5 - bit5
// #96: CONSTANT(LCD_read_DB6,64) ;                    Data DB6 - bit6
// #97: CONSTANT(LCD_read_DB7,128) ;                    Data DB7 - bit7
// #98: ;
// #99: ;
// #100: ;
// #101: ; StrataFLASH memory ports
// #102: ;
// #103: ; The FLASH memory is used to hold the authentication value as well as provide the
// #104: ; unique serial number from which the authentication algorithm computes the value.
// #105: ; In practice, the FLASH will also hold the configuration image for the Spartan device.
// #106: ;
// #107: ;
// #108: CONSTANT(SF_data_in_port,2) ;Read data from StrataFLASH device
// #109: ;
// #110: CONSTANT(SF_data_out_port,128) ;Data to write into StrataFLASH device
// #111: ;
// #112: CONSTANT(SF_addr_hi_port,131) ;StrataFLASH address[21:16] (6 LSB's)
// #113: CONSTANT(SF_addr_mi_port,130) ;StrataFLASH address[15:8]
// #114: CONSTANT(SF_addr_lo_port,129) ;StrataFLASH address[7:0]
// #115: ;
// #116: CONSTANT(SF_control_port,64) ;StrataFLASH control
// #117: CONSTANT(SF_read,1) ;         active High read - bit0
// #118: CONSTANT(SF_ce,2) ; active Low device enable - bit1
// #119: CONSTANT(SF_we,4) ;         active Low write - bit2
// #120: ;
// #121: ;
// #122: ; Design Authentication enable/disable signals.
// #123: ;
// #124: ; Hardware controls over the 'real' application.
// #125: ;
// #126: CONSTANT(authentication_control_port,16) ;Design disable control port
// #127: CONSTANT(security_disable_interrupts,1) ;   active High disable of interrupt generation - bit0
// #128: CONSTANT(security_disable_outputs,2) ;            active High disable of output pins - bit1
// #129: ;
// #130: ; Pseudo Random number generator
// #131: ;
// #132: CONSTANT(random_value_port,4) ;read LFSR counter value
// #133: ;
// #134: ;
// #135: ; Link FIFO buffer
// #136: ;
// #137: ; Provides a connection to the 'real' application such that 'soft tokens' in the
// #138: ; form of short messages to be passed to the 'real' application to enable or disable
// #139: ; it depending on the authentication status.
// #140: ;
// #141: CONSTANT(link_FIFO_write_port,4) ;write data to FIFO
// #142: ;
// #143: ;
// #144: ;**************************************************************************************
// #145: ; Special Register usage
// #146: ;**************************************************************************************
// #147: ;
// #148: NAMEREG(sF,UART_data) ;used to pass data to and from the UART
// #149: ;
// #150: ;
// #151: ;
// #152: ;**************************************************************************************
// #153: ;Scratch Pad Memory Locations
// #154: ;**************************************************************************************
// #155: ;
// #156: CONSTANT(ISR_preserve_s0,0) ;preserve register contents during Interrupt Service Routine
// #157: ;
// #158: ;
// #159: CONSTANT(serial_number0,16) ;64-bit serial number of StrataFlash
// #160: CONSTANT(serial_number1,17) ;LS-Byte first
// #161: CONSTANT(serial_number2,18)
// #162: CONSTANT(serial_number3,19)
// #163: CONSTANT(serial_number4,20)
// #164: CONSTANT(serial_number5,21)
// #165: CONSTANT(serial_number6,22)
// #166: CONSTANT(serial_number7,23)
// #167: ;
// #168: ;
// #169: CONSTANT(computed_CRC0,24) ;computed 16-bit CRC based on the
// #170: CONSTANT(computed_CRC1,25) ;  StrataFlash unique serial number (LS-Byte first)
// #171: ;
// #172: ;
// #173: CONSTANT(authentication_CRC0,26) ;16-bit CRC value read from authentication
// #174: CONSTANT(authentication_CRC1,27) ;  area of StrataFLASH memory (LS-Byte first)
// #175: ;
// #176: ;
// #177: CONSTANT(authentication_status,28) ;Status of design authentication
// #178: ;
// #179: ;
// #180: ;**************************************************************************************
// #181: ;Useful data constants
// #182: ;**************************************************************************************
// #183: ;
// #184: ;
// #185: ;
// #186: ;Constant to define a software delay of 1us. This must be adjusted to reflect the
// #187: ;clock applied to KCPSM3. Every instruction executes in 2 clock cycles making the
// #188: ;calculation highly predictable. The '6' in the following equation even allows for
// #189: ;'CALL delay_1us' instruction in the initiating code.
// #190: ;
// #191: ; delay_1us_constant =  (clock_rate - 6)/4       Where 'clock_rate' is in MHz
// #192: ;
// #193: ;Example: For a 50MHz clock the constant value is (10-6)/4 = 11  (0B Hex).
// #194: ;For clock rates below 10MHz the value of 1 must be used and the operation will
// #195: ;become lower than intended.
// #196: ;
// #197: CONSTANT(delay_1us_constant,11)
// #198: ;
// #199: ;
// #200: ;
// #201: ;
// #202: ;ASCII table
// #203: ;
// #204: CONSTANT(character_a,97)
// #205: CONSTANT(character_b,98)
// #206: CONSTANT(character_c,99)
// #207: CONSTANT(character_d,100)
// #208: CONSTANT(character_e,101)
// #209: CONSTANT(character_f,102)
// #210: CONSTANT(character_g,103)
// #211: CONSTANT(character_h,104)
// #212: CONSTANT(character_i,105)
// #213: CONSTANT(character_j,106)
// #214: CONSTANT(character_k,107)
// #215: CONSTANT(character_l,108)
// #216: CONSTANT(character_m,109)
// #217: CONSTANT(character_n,110)
// #218: CONSTANT(character_o,111)
// #219: CONSTANT(character_p,112)
// #220: CONSTANT(character_q,113)
// #221: CONSTANT(character_r,114)
// #222: CONSTANT(character_s,115)
// #223: CONSTANT(character_t,116)
// #224: CONSTANT(character_u,117)
// #225: CONSTANT(character_v,118)
// #226: CONSTANT(character_w,119)
// #227: CONSTANT(character_x,120)
// #228: CONSTANT(character_y,121)
// #229: CONSTANT(character_z,122)
// #230: CONSTANT(character_A,65)
// #231: CONSTANT(character_B,66)
// #232: CONSTANT(character_C,67)
// #233: CONSTANT(character_D,68)
// #234: CONSTANT(character_E,69)
// #235: CONSTANT(character_F,70)
// #236: CONSTANT(character_G,71)
// #237: CONSTANT(character_H,72)
// #238: CONSTANT(character_I,73)
// #239: CONSTANT(character_J,74)
// #240: CONSTANT(character_K,75)
// #241: CONSTANT(character_L,76)
// #242: CONSTANT(character_M,77)
// #243: CONSTANT(character_N,78)
// #244: CONSTANT(character_O,79)
// #245: CONSTANT(character_P,80)
// #246: CONSTANT(character_Q,81)
// #247: CONSTANT(character_R,82)
// #248: CONSTANT(character_S,83)
// #249: CONSTANT(character_T,84)
// #250: CONSTANT(character_U,85)
// #251: CONSTANT(character_V,86)
// #252: CONSTANT(character_W,87)
// #253: CONSTANT(character_X,88)
// #254: CONSTANT(character_Y,89)
// #255: CONSTANT(character_Z,90)
// #256: CONSTANT(character_0,48)
// #257: CONSTANT(character_1,49)
// #258: CONSTANT(character_2,50)
// #259: CONSTANT(character_3,51)
// #260: CONSTANT(character_4,52)
// #261: CONSTANT(character_5,53)
// #262: CONSTANT(character_6,54)
// #263: CONSTANT(character_7,55)
// #264: CONSTANT(character_8,56)
// #265: CONSTANT(character_9,57)
// #266: CONSTANT(character_colon,58)
// #267: CONSTANT(character_fullstop,46)
// #268: CONSTANT(character_semi_colon,59)
// #269: CONSTANT(character_minus,45)
// #270: CONSTANT(character_divide,47) ;'/'
// #271: CONSTANT(character_plus,43)
// #272: CONSTANT(character_comma,44)
// #273: CONSTANT(character_less_than,60)
// #274: CONSTANT(character_greater_than,62)
// #275: CONSTANT(character_equals,61)
// #276: CONSTANT(character_space,32)
// #277: CONSTANT(character_CR,13) ;carriage return
// #278: CONSTANT(character_question,63) ;'?'
// #279: CONSTANT(character_dollar,36)
// #280: CONSTANT(character_exclaim,33) ;'!'
// #281: CONSTANT(character_BS,8) ;Back Space command character
// #282: ;
// #283: ;
// #284: ;
// #285: ;
// #286: ;
// #287: ;**************************************************************************************
// #288: ;Initialise the system
// #289: ;**************************************************************************************
// #290: ;
// @000 #291: [cold_start]
300e1 // @000 #291: CALL(SF_init) ;initialise StrataFLASH controls
00000 // @001 #292: LOAD(s0,0) ;Start with application enabled in hardware
2c010 // @002 #293: OUTPUT(s0,authentication_control_port)
00050 // @003 #294: LOAD(s0,character_P) ;start with design enabled by software (see ISR)
2e01c // @004 #295: STORE(s0,authentication_status)
3035b // @005 #296: CALL(delay_1s) ;delay to allow system to settle
30328 // @006 #297: CALL(LCD_reset) ;Initialise the LCD
// #298: ;
3c001 // @007 #299: ENABLE(INTERRUPT) ;interrupts to provide software enable to application
// #300: ;
// #301: ;**************************************************************************************
// #302: ; Main program
// #303: ;**************************************************************************************
// #304: ;
// #305: ; The main program follows a logical sequence of events describing the power on and
// #306: ; authentication process of a design. This process will is either successfully authorises
// #307: ; the 'real' application to operate or fail to authenticate and disable the 'real'
// #308: ; application in a similar way to a production design. The only difference that it keeps
// #309: ; you informed about what it is doing on both the LCD display and PC terminal via the UART.
// #310: ; A real production design should keep all details hidden.
// #311: ;
// #312: ; Following the authentication check and control over the 'real' application a simple menu
// #313: ; is provided on the PC terminal to allow you to read, write and erase the authentication
// #314: ; area of the StrataFLASH memory and therefore evaluate the design authentication security
// #315: ; of this reference design.
// #316: ;
// #317: ;
// #318: ;
// #319: ; Write welcome message to LCD display
// #320: ;
// @008 #321: [warm_start]
00512 // @008 #321: LOAD(s5,18) ;Line 1 position 2
3033e // @009 #322: CALL(LCD_cursor)
30364 // @00a #323: CALL(disp_PicoBlaze) ;Display 'PicoBlaze'
00525 // @00b #324: LOAD(s5,37) ;Line 2 position 5
3033e // @00c #325: CALL(LCD_cursor)
30377 // @00d #326: CALL(disp_Security) ;Display 'Security'
// #327: ;
// #328: ; Write welcome message to PC via UART