📄 control.psm
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CALL read_byte_slow ;read address into [s5,s4]
LOAD s4, s3
CALL read_byte_slow
LOAD s5, s3
STORE s4, (sE) ;record sequence
ADD sE, 01 ;increment pointer
STORE s5, (sE) ;record sequence
ADD sE, 01 ;increment pointer
LOAD s0, s5 ;display address
CALL send_hex_byte
LOAD s0, s4
CALL send_hex_byte
CALL send_ES ;display 'E/S='
CALL read_byte_slow ;read E/S register
STORE s3, (sE) ;record sequence
ADD sE, 01 ;increment pointer
LOAD s0, s3 ;display value
CALL send_hex_byte
CALL send_data ;display 'Data='
CALL send_equals
LOAD s4, 08 ;8 bytes to read
rsc_loop: CALL send_space
CALL read_byte_slow ;read data byte
STORE s3, (sE) ;record sequence
ADD sE, 01 ;increment pointer
LOAD s0, s3 ;display value
CALL send_hex_byte
SUB s4, 01 ;count bytes
JUMP NZ, rsc_loop
CALL read_byte_slow ;read 16-bit CRC into [s5,s4]
LOAD s4, s3
CALL read_byte_slow
LOAD s5, s3
STORE s4, (sE) ;record command sequence
ADD sE, 01 ;increment pointer
STORE s5, (sE) ;record command sequence
CALL send_CR
CALL send_CRC ;'CRC=' to display CRC value
LOAD s0, s5
CALL send_hex_byte
LOAD s0, s4
CALL send_hex_byte
CALL send_CR
LOAD s2, 0C ;12 (0C hex) bytes in this command
CALL compute_CRC16 ;compute CRC value in [s1,s0]
FETCH s5, (sE) ;compare with received value
SUB sE, 01
FETCH s4, (sE) ;compare with received value
COMPARE s5, s1
JUMP NZ, rsc_crc16_fail
COMPARE s4, s0
JUMP NZ, rsc_crc16_fail
CALL send_Pass
JUMP reset_menu ;needs master reset next
rsc_crc16_fail: CALL send_Fail
JUMP reset_menu ;needs master reset next
;
;
;
;**************************************************************************************
; Compute 8-bit CRC used by DS2432.
;**************************************************************************************
;
; The DS2432 computes an 8-bit CRC using the polynomial X8 + X5 + X4 + 1.
; See the DS2432 data sheet for full details.
;
; Test input value of value 00 00 00 01 B8 1C 02
; should produce CRC=A2.
;
; This routine computes the same CRC based on the values stored in the KCPSM3
; scratch pad memory by the read ROM command. The result is returned in register s0.
;
; Registers used s0,s1,s2,s3,s4,s5,s6,s7,s8,s9
;
;
;Start by loading family code and serial number (56-bits) into
;register set [s9,s8,s7,s6,s5,s4,s3] so they can be shifted out
;LSB first.
;
compute_CRC8: FETCH s3, family_code
FETCH s4, serial_number0
FETCH s5, serial_number1
FETCH s6, serial_number2
FETCH s7, serial_number3
FETCH s8, serial_number4
FETCH s9, serial_number5
LOAD s2, 38 ;56 bits to shift (38 hex)
LOAD s0, 00 ;clear CRC value
crc8_loop: LOAD s1, s0 ;copy current CRC value
XOR s1, s3 ;Need to know LSB XOR next input bit
TEST s1, 01 ;test result of XOR in LSB
JUMP NC, crc8_shift
XOR s0, 18 ;compliment bits 3 and 4 of CRC
crc8_shift: SR0 s1 ;Carry gets LSB XOR next input bit
SRA s0 ;shift Carry into MSB to form new CRC value
SR0 s9 ;shift input value
SRA s8
SRA s7
SRA s6
SRA s5
SRA s4
SRA s3
SUB s2, 01 ;count iterations
JUMP NZ, crc8_loop
RETURN
;
;
;
;**************************************************************************************
; Compute 16-bit CRC used by DS2432.
;**************************************************************************************
;
; The DS2432 computes a 16-bit CRC using the polynomial X16 + X15 + X2 + 1.
; See the DS2432 data sheet for full details.
;
; Note that the value formed in the CRC shift register is inverted to give the
; same value as that sent from the DS2432 during scratchpad write, scratchpad read
; and read auth page commands.
;
; This routine computes the CRC based on the values stored in the KCPSM3
; scratch pad memory starting at address defined by constant 'command_start'.
; register 's2' must specify how many bytes are to be used in the calculation
; and the CRC is returned in register pair [s1,s0] once it has been inverted.
;
; Registers used s0,s1,s2,s3,s4,s5,s6
;
;
;Start by loading family code and serial number (56-bits) into
;register set [s9,s8,s7,s6,s5,s4,s3] so they can be shifted out
;LSB first.
;
compute_CRC16: LOAD s5, command_start ;memory pointer
LOAD s0, 00 ;clear CRC value
LOAD s1, 00
crc16_byte_loop: FETCH s4, (s5) ;read input byte
LOAD s3, 08 ;8-bits to shift
crc16_bit_loop: LOAD s6, s0 ;copy current CRC value
XOR s6, s4 ;Need to know LSB XOR next input bit
TEST s6, 01 ;test result of XOR in LSB
JUMP NC, crc16_shift
XOR s0, 02 ;compliment bit 1 of CRC
XOR s1, 40 ;compliment bit 14 of CRC
crc16_shift: SR0 s6 ;Carry gets LSB XOR next input bit
SRA s1 ;shift Carry into MSB to form new CRC value
SRA s0
SR0 s4 ;shift input value
SUB s3, 01 ;count bits
JUMP NZ, crc16_bit_loop ;next bit
ADD s5, 01 ;increment memory pointer
SUB s2, 01 ;count bytes
JUMP NZ, crc16_byte_loop ;next byte
XOR s0, FF ;1's complement of CRC value
XOR s1, FF
RETURN
;
;
;**************************************************************************************
; Initialise the DS2432 1-wire interface.
;**************************************************************************************
;
; The 1-wire interface is an open-collector communication scheme employing an external
; pull-up resistor of 680 Ohms.
;
; The hardware section of this translates the one bit signal from PicoBlaze such that
; when this signal is Low the output is driven Low, but when it is High, it turns off
; the output buffer and the signal is pulled High externally.
;
; This initialisation routine simply ensures that the line is High after configuration.
; It is vital that DS_wire is generally in the High state because it is the only way in
; which the DS2432 device derives power to operate.
;
; Registers used s0
;
DS_wire_init: LOAD s0, DS_wire
OUTPUT s0, DS_wire_out_port
RETURN
;
;
;**************************************************************************************
; DS2432 initialisation - Regular Speed.
;**************************************************************************************
;
; The initialisation sequence must be performed before any communication can be
; made with the DS2432 device. This involves the application of an active Low master
; reset pulse.
;
; The regular (slow) speed communication is established by transmitting an active
; Low reset pulse for a duration of at least 480us. This design generates a 500us pulse.
;
; The DS2432 acknowledges the reset and the setting of regular mode by generating an
; active Low 'Rx Presence Pulse'. This presence pulse can start 15 to 60us after the
; reset pulse and will end between 120 and 300us after the reset pulse.
;
; To confirm that regular mode has been set, this routine confirms that the presence pulse
; is active only after 60us have elapsed since the reset pulse. This ensures that the
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