control.rmh

和picoblaze完全兼容的mcu ip core

01040 // @102 #626: LOAD(s0,s4)
301ee // @103 #627: CALL(send_hex_byte)
3021f // @104 #628: CALL(send_CR)
0020c // @105 #629: LOAD(s2,12) ;12 (0C hex) bytes in this command
3012c // @106 #630: CALL(compute_CRC16) ;compute CRC value in [s1,s0]
075e0 // @107 #631: FETCH(s5,sE) ;compare with received value
1ce01 // @108 #632: SUB(sE,1)
074e0 // @109 #633: FETCH(s4,sE) ;compare with received value
15510 // @10a #634: COMPARE(s5,s1)
35510 // @10b #635: JUMP(NZ,rsc_crc16_fail)
15400 // @10c #636: COMPARE(s4,s0)
35510 // @10d #637: JUMP(NZ,rsc_crc16_fail)
30345 // @10e #638: CALL(send_Pass)
34003 // @10f #639: JUMP(reset_menu) ;needs master reset next
// @110 #640: [rsc_crc16_fail]
3034d // @110 #640: CALL(send_Fail)
34003 // @111 #641: JUMP(reset_menu) ;needs master reset next
// #642: ;
// #643: ;
// #644: ;
// #645: ;**************************************************************************************
// #646: ; Compute 8-bit CRC used by DS2432.
// #647: ;**************************************************************************************
// #648: ;
// #649: ; The DS2432 computes an 8-bit CRC using the polynomial X8 + X5 + X4 + 1.
// #650: ; See the DS2432 data sheet for full details.
// #651: ;
// #652: ; Test input value of value 00 00 00 01 B8 1C 02
// #653: ; should produce CRC=A2.
// #654: ;
// #655: ; This routine computes the same CRC based on the values stored in the KCPSM3
// #656: ; scratch pad memory by the read ROM command. The result is returned in register s0.
// #657: ;
// #658: ; Registers used s0,s1,s2,s3,s4,s5,s6,s7,s8,s9
// #659: ;
// #660: ;
// #661: ;Start by loading family code and serial number (56-bits) into
// #662: ;register set [s9,s8,s7,s6,s5,s4,s3] so they can be shifted out
// #663: ;LSB first.
// #664: ;
// @112 #665: [compute_CRC8]
06300 // @112 #665: FETCH(s3,family_code)
06401 // @113 #666: FETCH(s4,serial_number0)
06502 // @114 #667: FETCH(s5,serial_number1)
06603 // @115 #668: FETCH(s6,serial_number2)
06704 // @116 #669: FETCH(s7,serial_number3)
06805 // @117 #670: FETCH(s8,serial_number4)
06906 // @118 #671: FETCH(s9,serial_number5)
00238 // @119 #672: LOAD(s2,56) ;56 bits to shift (38 hex)
00000 // @11a #673: LOAD(s0,0) ;clear CRC value
// @11b #674: [crc8_loop]
01100 // @11b #674: LOAD(s1,s0) ;copy current CRC value
0f130 // @11c #675: XOR(s1,s3) ;Need to know LSB XOR next input bit
12101 // @11d #676: TEST(s1,1) ;test result of XOR in LSB
35d20 // @11e #677: JUMP(NC,crc8_shift)
0e018 // @11f #678: XOR(s0,24) ;compliment bits 3 and 4 of CRC
// @120 #679: [crc8_shift]
2010e // @120 #679: SR0(s1) ;Carry gets LSB XOR next input bit
20008 // @121 #680: SRA(s0) ;shift Carry into MSB to form new CRC value
2090e // @122 #681: SR0(s9) ;shift input value
20808 // @123 #682: SRA(s8)
20708 // @124 #683: SRA(s7)
20608 // @125 #684: SRA(s6)
20508 // @126 #685: SRA(s5)
20408 // @127 #686: SRA(s4)
20308 // @128 #687: SRA(s3)
1c201 // @129 #688: SUB(s2,1) ;count iterations
3551b // @12a #689: JUMP(NZ,crc8_loop)
2a000 // @12b #690: RETURN
// #691: ;
// #692: ;
// #693: ;
// #694: ;**************************************************************************************
// #695: ; Compute 16-bit CRC used by DS2432.
// #696: ;**************************************************************************************
// #697: ;
// #698: ; The DS2432 computes a 16-bit CRC using the polynomial X16 + X15 + X2 + 1.
// #699: ; See the DS2432 data sheet for full details.
// #700: ;
// #701: ; Note that the value formed in the CRC shift register is inverted to give the
// #702: ; same value as that sent from the DS2432 during scratchpad write, scratchpad read
// #703: ; and read auth page commands.
// #704: ;
// #705: ; This routine computes the CRC based on the values stored in the KCPSM3
// #706: ; scratch pad memory starting at address defined by constant 'command_start'.
// #707: ; register 's2' must specify how many bytes are to be used in the calculation
// #708: ; and the CRC is returned in register pair [s1,s0] once it has been inverted.
// #709: ;
// #710: ; Registers used s0,s1,s2,s3,s4,s5,s6
// #711: ;
// #712: ;
// #713: ;Start by loading family code and serial number (56-bits) into
// #714: ;register set [s9,s8,s7,s6,s5,s4,s3] so they can be shifted out
// #715: ;LSB first.
// #716: ;
// @12c #717: [compute_CRC16]
00508 // @12c #717: LOAD(s5,command_start) ;memory pointer
00000 // @12d #718: LOAD(s0,0) ;clear CRC value
00100 // @12e #719: LOAD(s1,0)
// @12f #720: [crc16_byte_loop]
07450 // @12f #720: FETCH(s4,s5) ;read input byte
00308 // @130 #721: LOAD(s3,8) ;8-bits to shift
// @131 #722: [crc16_bit_loop]
01600 // @131 #722: LOAD(s6,s0) ;copy current CRC value
0f640 // @132 #723: XOR(s6,s4) ;Need to know LSB XOR next input bit
12601 // @133 #724: TEST(s6,1) ;test result of XOR in LSB
35d37 // @134 #725: JUMP(NC,crc16_shift)
0e002 // @135 #726: XOR(s0,2) ;compliment bit 1 of CRC
0e140 // @136 #727: XOR(s1,64) ;compliment bit 14 of CRC
// @137 #728: [crc16_shift]
2060e // @137 #728: SR0(s6) ;Carry gets LSB XOR next input bit
20108 // @138 #729: SRA(s1) ;shift Carry into MSB to form new CRC value
20008 // @139 #730: SRA(s0)
2040e // @13a #731: SR0(s4) ;shift input value
1c301 // @13b #732: SUB(s3,1) ;count bits
35531 // @13c #733: JUMP(NZ,crc16_bit_loop) ;next bit
18501 // @13d #734: ADD(s5,1) ;increment memory pointer
1c201 // @13e #735: SUB(s2,1) ;count bytes
3552f // @13f #736: JUMP(NZ,crc16_byte_loop) ;next byte
0e0ff // @140 #737: XOR(s0,FF) ;1's complement of CRC value
0e1ff // @141 #738: XOR(s1,FF)
2a000 // @142 #739: RETURN
// #740: ;
// #741: ;
// #742: ;**************************************************************************************
// #743: ; Initialise the DS2432 1-wire interface.
// #744: ;**************************************************************************************
// #745: ;
// #746: ; The 1-wire interface is an open-collector communication scheme employing an external
// #747: ; pull-up resistor of 680 Ohms.
// #748: ;
// #749: ; The hardware section of this translates the one bit signal from PicoBlaze such that
// #750: ; when this signal is Low the output is driven Low, but when it is High, it turns off
// #751: ; the output buffer and the signal is pulled High externally.
// #752: ;
// #753: ; This initialisation routine simply ensures that the line is High after configuration.
// #754: ; It is vital that DS_wire is generally in the High state because it is the only way in
// #755: ; which the DS2432 device derives power to operate.
// #756: ;
// #757: ; Registers used s0
// #758: ;
// @143 #759: [DS_wire_init]
00001 // @143 #759: LOAD(s0,DS_wire)
2c008 // @144 #760: OUTPUT(s0,DS_wire_out_port)
2a000 // @145 #761: RETURN
// #762: ;
// #763: ;
// #764: ;**************************************************************************************
// #765: ; DS2432 initialisation - Regular Speed.
// #766: ;**************************************************************************************
// #767: ;
// #768: ; The initialisation sequence must be performed before any communication can be
// #769: ; made with the DS2432 device. This involves the application of an active Low master
// #770: ; reset pulse.
// #771: ;
// #772: ; The regular (slow) speed communication is established by transmitting an active
// #773: ; Low reset pulse for a duration of at least 480us. This design generates a 500us pulse.
// #774: ;
// #775: ; The DS2432 acknowledges the reset and the setting of regular mode by generating an
// #776: ; active Low 'Rx Presence Pulse'. This presence pulse can start 15 to 60us after the
// #777: ; reset pulse and will end between 120 and 300us after the reset pulse.
// #778: ;
// #779: ; To confirm that regular mode has been set, this routine confirms that the presence pulse
// #780: ; is active only after 60us have elapsed since the reset pulse. This ensures that the
// #781: ; faster presence pulse of overdrive mode can not be detected.
// #782: ;
// #783: ; The carry flag will be set if no valid presence pulse was received (wire remained High) and
// #784: ; can be used to indicate an initialisation failure or success.
// #785: ;
// #786: ; The routine only completes 300us after the presence pulse to ensure the DS2432 has
// #787: ; completed the presence pulse and is ready for the first operation.
// #788: ;
// #789: ; Registers used s0,s1,s2
// #790: ;
// @146 #791: [DS_init_regular_mode]
00000 // @146 #791: LOAD(s0,0) ;transmit reset pulse
2c008 // @147 #792: OUTPUT(s0,DS_wire_out_port)
// #793: ;Delay of 500us is equivalent to 12500 instructions at 50MHz.
// #794: ;This delay loop is formed of 28 instructions requiring 446 repetitions.
00201 // @148 #795: LOAD(s2,1) ;[s3,s2]=445 decimal (01BD hex)
001bd // @149 #796: LOAD(s1,BD)
// @14a #797: [rm_wait_500us]
3019a // @14a #797: CALL(delay_1us) ;25 instructions including CALL
1c101 // @14b #798: SUB(s1,1) ;decrement delay counter
1e200 // @14c #799: SUBCY(s2,0)
35d4a // @14d #800: JUMP(NC,rm_wait_500us) ;repeat until -1
00001 // @14e #801: LOAD(s0,1) ;end of regular reset pulse
2c008 // @14f #802: OUTPUT(s0,DS_wire_out_port)
// #803: ;Delay of 60us is equivalent to 1500 instructions at 50MHz.
// #804: ;This delay and is formed of 27 instructions requiring 56 repetitions.
00138 // @150 #805: LOAD(s1,56) ;56 (38 hex)
// @151 #806: [rm_wait_60us]
3019a // @151 #806: CALL(delay_1us) ;25 instructions including CALL
1c101 // @152 #807: SUB(s1,1) ;decrement delay counter
35551 // @153 #808: JUMP(NZ,rm_wait_60us) ;repeat until zero
// #809: ;The DS_wire is now checked at approximately 1us intervals for the next 240us looking
// #810: ;to detect an active Low presence pulse. The 240us is equivalent to 6000 instructions
// #811: ;at 50MHz and this polling loop is formed of 33 instructions requiring 182 repetitions.
00201 // @154 #812: LOAD(s2,1) ;set bit which will be reset by a presence pulse
001b6 // @155 #813: LOAD(s1,B6) ;182 (B6 hex)
// @156 #814: [rm_poll_240us]
3019a // @156 #814: CALL(delay_1us) ;25 instructions including CALL
3015d // @157 #815: CALL(read_DS_wire) ;read wire - 5 instructions including CALL
0b200 // @158 #816: AND(s2,s0) ;clear flag if DS_wire was Low
1c101 // @159 #817: SUB(s1,1) ;decrement delay counter
35556 // @15a #818: JUMP(NZ,rm_poll_240us) ;repeat until zero
12201 // @15b #819: TEST(s2,1) ;set carry flag if no pulse detected
2a000 // @15c #820: RETURN
// #821: ;
// #822: ;
// #823: ;**************************************************************************************
// #824: ; Read the DS_wire
// #825: ;**************************************************************************************
// #826: ;
// #827: ; The DS_wire signal is read and returned in bit0 of register 's0'.
// #828: ; Additionally the carry flag is set if the signal is High and reset if Low
// #829: ;
// #830: ; Registers used s0
// #831: ;
// @15d #832: [read_DS_wire]
04002 // @15d #832: INPUT(s0,DS_wire_in_port)
0a001 // @15e #833: AND(s0,DS_wire) ;ensure only bit0 is active
12001 // @15f #834: TEST(s0,DS_wire) ;set carry flag if DS_wire is High
2a000 // @160 #835: RETURN
// #836: ;
// #837: ;
// #838: ;
// #839: ;**************************************************************************************
// #840: ; Write a byte to DS2432 in regular speed mode.
// #841: ;**************************************************************************************
// #842: ;
// #843: ; Bytes are written to the DS2432 with LSB first.
// #844: ;
// #845: ; The byte to be written should be provided in register 's3' and this will be preserved.
// #846: ;
// #847: ; Registers used s0,s1,s2,s3
// #848: ;
// @161 #849: [write_byte_slow]
00208 // @161 #849: LOAD(s2,8) ;8 bits to transmit
// @162 #850: [wbs_loop]
2030c // @162 #850: RR(s3) ;test next bit LSB first
35966 // @163 #851: JUMP(C,wbs1) ;transmit '0' or '1'
3016a // @164 #852: CALL(write_Low_slow)
34167 // @165 #853: JUMP(next_slow_bit)
// @166 #854: [wbs1]
30175 // @166 #854: CALL(write_High_slow)
// @167 #855: [next_slow_bit]
1c201 // @167 #855: SUB(s2,1) ;count bits
35562 // @168 #856: JUMP(NZ,wbs_loop) ;repeat until 8-bits transmitted
2a000 // @169 #857: RETURN
// #858: ;
// #859: ;
// #860: ;
// #861: ;**************************************************************************************
// #862: ; Write a '0' to DS_wire in regular speed mode.
// #863: ;**************************************************************************************
// #864: ;
// #865: ; To write a '0' to the DS_wire the signal must be Low for 60 to 120us. This design
// #866: ; generates a 78us active Low pulse.
// #867: ;
// #868: ; The DS2432 then requires at least 1us of recovery time for which this routine
// #869: ; provides a 2us delay such that the entire write Low process (slot time) is 80us.
// #870: ; A recovery time of 1us was also found to be marginal in practice probably due
// #871: ; to the rise time of the DS_wire via the external pull up resistor.
// #872: ;
// #873: ; Registers used s0,s1
// #874: ;
// @16a #875: [write_Low_slow]
00000 // @16a #875: LOAD(s0,0) ;transmit Low pulse
2c008 // @16b #876: OUTPUT(s0,DS_wire_out_port)
// #877: ;Delay of 78us is equivalent to 1950 instructions at 50MHz.
// #878: ;This delay loop is formed of 27 instructions requiring 72 repetitions.
00148 // @16c #879: LOAD(s1,72) ;72 (48 hex)
// @16d #880: [wls_wait_78us]
3019a // @16d #880: CALL(delay_1us) ;25 instructions including CALL
1c101 // @16e #881: SUB(s1,1) ;decrement delay counter
3556d // @16f #882: JUMP(NZ,wls_wait_78us) ;repeat until zero
00001 // @170 #883: LOAD(s0,1) ;end of Low pulse
2c008 // @171 #884: OUTPUT(s0,DS_wire_out_port)
3019a // @172 #885: CALL(delay_1us) ;2us recovery time
3019a // @173 #886: CALL(delay_1us)
2a000 // @174 #887: RETURN
// #888: ;
// #889: ;
// #890: ;**************************************************************************************
// #891: ; Write a '1' to DS_wire in regular speed mode.
// #892: ;**************************************************************************************
// #893: ;
// #894: ; To write a '1' to the DS_wire the signal must be Low for 1 to 15us to instigate the
// #895: ; write of the data. This design generates an 8us active Low pulse for this purpose.
// #896: ;
// #897: ; Then the output must be High for 53 to 114us to provide the '1' for the DS2432 to
// #898: ; read and then provide recovery time. This design implements a 72us delay such that
// #899: ; the entire write High process (slot time) is 80us
// #900: ;
// #901: ; Registers used s0,s1
// #902: ;
// @175 #903: [write_High_slow]
00000 // @175 #903: LOAD(s0,0) ;transmit Low pulse
2c008 // @176 #904: OUTPUT(s0,DS_wire_out_port)