dac_ctrl.rmh

和picoblaze完全兼容的mcu ip core

// #164: ;Channel A is a square wave of 2KHz.
// #165: ;
// #166: ;This is formed from the 2KHz square wave on channel C and demonstrates that the
// #167: ;D/A converter echoes the previously sent 32-bit command word.
// #168: ;
// #169: ;Following the interrupt service routine (ISR), the register set [s9,s8,s7,s6]
// #170: ;will contain the command which was last sent for the setting of channel C. The
// #171: ;12-bit sample value is extracted from this word and stored in the location for
// #172: ;channel A. This should mean that channel A is one sample behind channel C. In this
// #173: ;version that does not mean a lag of 90 degrees because each output is updated
// #174: ;sequentially and that takes approximatly 14.5us per channel.
// #175: ;
// #176: ;This will also demonstrate that the reference voltage on channels A and B is 3.3v
// #177: ;compared with 2.5v on channels C and D. So whilst the square wave on channel C is
// #178: ;set for 0.50v to 2.00v, it should be 0.66v to 2.64v on channel A.
// #179: ;
2070e // @012 #180: SR0(s7) ; shift 12-bit value right 4 places
20608 // @013 #181: SRA(s6)
2070e // @014 #182: SR0(s7)
20608 // @015 #183: SRA(s6)
2070e // @016 #184: SR0(s7)
20608 // @017 #185: SRA(s6)
2070e // @018 #186: SR0(s7)
20608 // @019 #187: SRA(s6)
2e701 // @01a #188: STORE(s7,chan_A_msb) ;store value for D/A output
2e600 // @01b #189: STORE(s6,chan_A_lsb)
// #190: ;
// #191: ;
// #192: ;
// #193: ;
// #194: ;Channel B is a triangle waveform of 200Hz.
// #195: ;
// #196: ;Given the sample rate of 8KHz, there are 40 samples per waveform period.
// #197: ;To achieve close to full scale deflection, the waveform needs to increase or
// #198: ;decrease by 204 each sample so that over the first 20 samples it rises from
// #199: ;0 to 4080 and then over the next 20 samples it reduces back to zero.
// #200: ;
06002 // @01c #201: FETCH(s0,chan_B_lsb) ;load current value into [s1,s0]
06103 // @01d #202: FETCH(s1,chan_B_msb)
06208 // @01e #203: FETCH(s2,triangle_up_down) ;read current slope direction
14200 // @01f #204: COMPARE(s2,0) ;determine current direction
3542a // @020 #205: JUMP(NZ,slope_down)
180cc // @021 #206: ADD(s0,CC) ;add 204 (00CC hex) to current value
1a100 // @022 #207: ADDCY(s1,0)
1410f // @023 #208: COMPARE(s1,15) ;test for peak value of 4080 (0FF0 hex)
35432 // @024 #209: JUMP(NZ,store_channel_B)
140f0 // @025 #210: COMPARE(s0,F0)
35432 // @026 #211: JUMP(NZ,store_channel_B)
00201 // @027 #212: LOAD(s2,1) ;change to slope down next time
2e208 // @028 #213: STORE(s2,triangle_up_down)
34032 // @029 #214: JUMP(store_channel_B)
// @02a #215: [slope_down]
1c0cc // @02a #215: SUB(s0,CC) ;subtract 204 (00CC hex) from current value
1e100 // @02b #216: SUBCY(s1,0)
14100 // @02c #217: COMPARE(s1,0) ;test for zero (0000 hex)
35432 // @02d #218: JUMP(NZ,store_channel_B)
14000 // @02e #219: COMPARE(s0,0)
35432 // @02f #220: JUMP(NZ,store_channel_B)
00200 // @030 #221: LOAD(s2,0) ;change to slope up next time
2e208 // @031 #222: STORE(s2,triangle_up_down)
// @032 #223: [store_channel_B]
2e002 // @032 #223: STORE(s0,chan_B_lsb) ;store value for D/A output
2e103 // @033 #224: STORE(s1,chan_B_msb)
// #225: ;
// #226: ;
// #227: ;Channel C is a square wave of 2KHz.
// #228: ;
// #229: ;Since the sample rate is 8KHz, this square wave is formed of two samples at a
// #230: ;low level and two samples at a high level. This is used to demonstrate when the
// #231: ;D/A converter output actually changes and how to determine the voltage levels.
// #232: ;It is also used indirectly to form the signal for channel A.
// #233: ;
// #234: ;The low level voltage is 0.50v.
// #235: ;   The 12-bit value is therefore 4096 x 0.5 / 2.5 = 819 (333 hex)
// #236: ;
// #237: ;The high level voltage is 2.00v.
// #238: ;   The 12-bit value is therefore 4096 x 2.0 / 2.5 = 3277 (CCD hex)
// #239: ;
// #240: ;
06209 // @034 #241: FETCH(s2,square_count) ;read sample counter
12202 // @035 #242: TEST(s2,2) ;bit 1 has correct frequency
3543a // @036 #243: JUMP(NZ,square_high)
00103 // @037 #244: LOAD(s1,3) ;Set low level
00033 // @038 #245: LOAD(s0,51)
3403c // @039 #246: JUMP(store_channel_C)
// @03a #247: [square_high]
0010c // @03a #247: LOAD(s1,12) ;Set high level
000cd // @03b #248: LOAD(s0,CD)
// @03c #249: [store_channel_C]
2e004 // @03c #249: STORE(s0,chan_C_lsb) ;store value for D/A output
2e105 // @03d #250: STORE(s1,chan_C_msb)
18201 // @03e #251: ADD(s2,1) ;increment sampel count
2e209 // @03f #252: STORE(s2,square_count) ;store new sample count
// #253: ;
// #254: ;Sine wave for channel D
// #255: ;
// #256: ;A synthesis algorithm is used to generate a stable 770Hz sine wave
// #257: ;which is one of the 8 tines used in DTMF telephone dialing.
// #258: ;
3005e // @040 #259: CALL(calc_next_sine)
2090e // @041 #260: SR0(s9) ;reduce value to 12-bits
20808 // @042 #261: SRA(s8)
2090e // @043 #262: SR0(s9)
20808 // @044 #263: SRA(s8)
2090e // @045 #264: SR0(s9)
20808 // @046 #265: SRA(s8)
18908 // @047 #266: ADD(s9,8) ;Scale signed number to mid-rail of unsigned output
2e907 // @048 #267: STORE(s9,chan_D_msb) ;store value for D/A output
2e806 // @049 #268: STORE(s8,chan_D_lsb)
// #269: ;
// #270: ;
// #271: ;Drive LEDs with simple binary count of the samples to indicate
// #272: ;that the design is active.
// #273: ;
06020 // @04a #274: FETCH(s0,sample_count_lsb) ;read sample counter
06121 // @04b #275: FETCH(s1,sample_count_msb)
18001 // @04c #276: ADD(s0,1) ;increment counter
1a100 // @04d #277: ADDCY(s1,0)
2e020 // @04e #278: STORE(s0,sample_count_lsb) ;store new value
2e121 // @04f #279: STORE(s1,sample_count_msb)
2c180 // @050 #280: OUTPUT(s1,LED_port) ;upper bits are 31.25Hz and lower
// #281: ;
3400f // @051 #282: JUMP(warm_start) ;wait for next interrupt
// #283: ;
// #284: ;**************************************************************************************
// #285: ;Sine wave synthesis algorithm
// #286: ;**************************************************************************************
// #287: ;
// #288: ;This example is set to generate 770Hz at a sample rate of 8KHz. 770Hz is one of
// #289: ;the eight DTMF frequences. Please see design documentation for more details.
// #290: ;
// @052 #291: [init_sine_wave]
00024 // @052 #291: LOAD(s0,36) ;initial value 9216 (2400 hex)
2e011 // @053 #292: STORE(s0,sine_y_msb)
00000 // @054 #293: LOAD(s0,0)
2e010 // @055 #294: STORE(s0,sine_y_lsb)
00000 // @056 #295: LOAD(s0,0) ;initial delayed value 0 (0000 hex)
2e013 // @057 #296: STORE(s0,sine_y1_msb)
2e012 // @058 #297: STORE(s0,sine_y1_lsb)
000d2 // @059 #298: LOAD(s0,D2) ;Coefficient for 770Hz is UFIX_16_15 value 53913/32768 = 1.64529
2e015 // @05a #299: STORE(s0,sine_k_msb)
00099 // @05b #300: LOAD(s0,153)
2e014 // @05c #301: STORE(s0,sine_k_lsb)
2a000 // @05d #302: RETURN
// #303: ;
// #304: ;
// #305: ;Calculate a new output sample for a single tone.
// #306: ;
// #307: ;The tone sample is generated as a 16-bit signed integer.
// #308: ;The waveform is virtually full scale deflection for a 15-bit integer
// #309: ;such that the addition of two tones for DTMF will not exceed the 16-bits
// #310: ;provided by two registers.
// #311: ;
// #312: ;Obtain current values from wscratch pad memory
// #313: ;
// @05e #314: [calc_next_sine]
06f11 // @05e #314: FETCH(sF,sine_y_msb) ;[sF,sE] is Y
06e10 // @05f #315: FETCH(sE,sine_y_lsb)
06d13 // @060 #316: FETCH(sD,sine_y1_msb) ;[sD,sC] is Y1
06c12 // @061 #317: FETCH(sC,sine_y1_lsb)
06b15 // @062 #318: FETCH(sB,sine_k_msb) ;[sB,sA] is K
06a14 // @063 #319: FETCH(sA,sine_k_lsb)
// #320: ;
// #321: ;16-bit signed by 16-bit unsigned multiplication. [s9,s8]=[sB,sA]x[sF,sE]
// #322: ;
// #323: ;The unsigned number is of format UFIX_16_15 resulting
// #324: ;in a FIX_32_15 product. Since only the integer part of the
// #325: ;product is to be retained as a 16-bit value, their is no
// #326: ;shift of the result on the last cycle of the multiplication.
// #327: ;Execution requires a maximum of 145 instructions.
// #328: ;
00900 // @064 #329: LOAD(s9,0) ;clear temporary result registers [s9,s8]
00800 // @065 #330: LOAD(s8,0)
00010 // @066 #331: LOAD(s0,16) ;16 bit multiply
// @067 #332: [mult_loop]
2090a // @067 #332: SRX(s9) ;signed divide result by 2
20808 // @068 #333: SRA(s8)
20b0e // @069 #334: SR0(sB) ;shift coefficient
20a08 // @06a #335: SRA(sA)
35c6e // @06b #336: JUMP(NC,no_mult_add) ;test for active bit
198e0 // @06c #337: ADD(s8,sE) ;16-bit signed addition
1b9f0 // @06d #338: ADDCY(s9,sF)
// @06e #339: [no_mult_add]
1c001 // @06e #339: SUB(s0,1) ;test for 16 cycles
35467 // @06f #340: JUMP(NZ,mult_loop)
// #341: ;
// #342: ;Subtract of delayed sample
// #343: ;
1d8c0 // @070 #344: SUB(s8,sC) ;16-bit signed subtract
1f9d0 // @071 #345: SUBCY(s9,sD)
// #346: ;
// #347: ;Update scratch pad memory with new sample values
// #348: ;
2ef13 // @072 #349: STORE(sF,sine_y1_msb) ;delayed sample gets previous output
2ee12 // @073 #350: STORE(sE,sine_y1_lsb)
2e911 // @074 #351: STORE(s9,sine_y_msb) ;new current sample
2e810 // @075 #352: STORE(s8,sine_y_lsb)
2a000 // @076 #353: RETURN
// #354: ;
// #355: ;
// #356: ;**************************************************************************************
// #357: ;SPI communication routines for D/A Converter
// #358: ;**************************************************************************************
// #359: ;
// #360: ;These routines will work with two output ports and one input port which should be
// #361: ;defined as follows using CONSTANT directives.
// #362: ;   (replace 'pp' with appropriate port address in each case)
// #363: ;In the list of CONSTANT directives, only the ones marked with a * are really required
// #364: ;for the D/A Converter system. The other directives are to control (disable) or
// #365: ;communicate with the other SPI components on the same SPI bus of the Spartan-3E Starter Kit.
// #366: ;
// #367: ;
// #368: ;
// #369: ;CONSTANT SPI_control_port, pp       ;SPI clock and chip selects     *
// #370: ;CONSTANT SPI_sck, 01                ;                  SCK - bit0   *
// #371: ;CONSTANT SPI_rom_cs, 02             ;    serial rom select - bit1
// #372: ;CONSTANT SPI_spare_control, 04      ;                spare - bit2
// #373: ;CONSTANT SPI_amp_cs, 08             ;     amplifier select - bit3
// #374: ;CONSTANT SPI_adc_conv, 10           ;          A/D convert - bit4
// #375: ;CONSTANT SPI_dac_cs, 20             ;           D/A select - bit5   *
// #376: ;CONSTANT SPI_amp_shdn, 40           ;       amplifier SHDN - bit6
// #377: ;CONSTANT SPI_dac_clr, 80            ;            D/A clear - bit7   *
// #378: ;
// #379: ;CONSTANT SPI_output_port, pp        ;SPI data output                *
// #380: ;CONSTANT SPI_sdo, 80                ;   SDO - bit7                  *
// #381: ;
// #382: ;CONSTANT SPI_input_port, pp         ;SPI data input                 *
// #383: ;CONSTANT SPI_sdi, 80                ;             SDI - bit7        *
// #384: ;CONSTANT SPI_amp_sdi, 40            ;   amplifier SDI - bit6
// #385: ;
// #386: ;
// #387: ;
// #388: ;
// #389: ;Initialise SPI bus
// #390: ;
// #391: ;This routine should be used to initialise the SPI bus.
// #392: ;The SCK clock is made low.
// #393: ;Device selections are made inactive as follows
// #394: ;   SPI_sck      = 0      Clock is Low (required)
// #395: ;   SPI_rom_cs   = 1      Deselect ROM
// #396: ;   spare        = 1      spare control bit
// #397: ;   SPI_amp_cs   = 1      Deselect amplifier
// #398: ;   SPI_adc_conv = 0      A/D convert ready to apply positive pulse
// #399: ;   SPI_dac_cs   = 1      Deselect D/A
// #400: ;   SPI_amp_shdn = 0      Amplifier active and available
// #401: ;   SPI_dac_clr  = 1      D/A clear off
// #402: ;
// @077 #403: [SPI_init]
000ae // @077 #403: LOAD(s0,AE) ;normally AE
2c008 // @078 #404: OUTPUT(s0,SPI_control_port)
2a000 // @079 #405: RETURN
// #406: ;
// #407: ;
// #408: ;
// #409: ;Send and receive one byte to and from the SPI D/A converter.
// #410: ;
// #411: ;The data supplied in register 's2' is transmitted to the SPI bus and
// #412: ;at the same time the received byte is used to replace the value in 's2'.
// #413: ;The SCK clock is generated by software and results in a communication rate of
// #414: ;2.5Mbit/s with a 50MHz clock.
// #415: ;
// #416: ;Note that you must have previously selected the required device on the bus
// #417: ;before attempting communication and you must subsequently deselect the device