frequencycount_v.sdo

FPGA设计频率计全套资料

        (PORT datad (584:584:584) (570:570:570))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH datac regin (478:478:478) (478:478:478))
        (IOPATH datad regin (309:309:309) (309:309:309))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst4\|COUNT\[1\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4489:4489:4489) (4557:4557:4557))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst4\|COUNT\[3\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (577:577:577) (575:575:575))
        (PORT datab (543:543:543) (543:543:543))
        (PORT datac (568:568:568) (582:582:582))
        (PORT datad (589:589:589) (574:574:574))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH datac regin (478:478:478) (478:478:478))
        (IOPATH datad regin (309:309:309) (309:309:309))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst4\|COUNT\[3\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4489:4489:4489) (4557:4557:4557))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst4\|CLK_OUT\~95_I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (541:541:541) (541:541:541))
        (PORT datac (576:576:576) (590:590:590))
        (IOPATH datab combout (442:442:442) (442:442:442))
        (IOPATH datac combout (292:292:292) (292:292:292))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_io")
    (INSTANCE CLK_SE\~I.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1469:1469:1469) (1469:1469:1469))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_io")
    (INSTANCE SEL\~I.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1475:1475:1475) (1475:1475:1475))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|EN\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datad (502:502:502) (513:513:513))
        (IOPATH datad regin (309:309:309) (309:309:309))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|EN\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1851:1851:1851) (1957:1957:1957))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[0\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (521:521:521) (533:533:533))
        (PORT datab (668:668:668) (674:674:674))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[0\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[1\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (491:491:491) (506:506:506))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[1\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[2\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (502:502:502) (514:514:514))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout (583:583:583) (583:583:583))
        (IOPATH cin0 cout (178:178:178) (178:178:178))
        (IOPATH cin1 cout (157:157:157) (157:157:157))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[2\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[3\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (491:491:491) (505:505:505))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[3\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[4\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (523:523:523) (534:534:534))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[4\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[5\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (522:522:522) (534:534:534))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[5\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[6\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (510:510:510) (520:520:520))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[6\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE inst\|NUM\[7\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (522:522:522) (535:535:535))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout (838:838:838) (838:838:838))
        (IOPATH cin cout (208:208:208) (208:208:208))
        (IOPATH cin0 cout (271:271:271) (271:271:271))
        (IOPATH cin1 cout (258:258:258) (258:258:258))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE inst\|NUM\[7\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2710:2710:2710) (2792:2792:2792))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (4267:4267:4267) (4369:4369:4369))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))