incaip.c

基于mips CPU

/*
 * (C) Copyright 2003
 * Wolfgang Denk, DENX Software Engineering, [e-mail].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <command.h>
#include <asm/addrspace.h>
#include <asm/inca-ip.h>
#include <net.h>

extern uint incaip_get_cpuclk(void);
#define inca_watchdog_flag  0x80000010
#define inca_watchdog_epc   0x80000014
#define inca_watchdog_eepc  0x80000018
#define inca_watchdog_nmisr 0x8000001C

static ulong max_sdram_size(void)
{
	/* The only supported SDRAM data width is 16bit.
	 */
#define CFG_DW	2

	/* The only supported number of SDRAM banks is 4.
	 */
#define CFG_NB	4

	ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
	int   cols   = cfgpb0 & 0xF;
	int   rows   = (cfgpb0 & 0xF0) >> 4;
	ulong size   = (1 << (rows + cols)) * CFG_DW * CFG_NB;

	return size;
}

long int initdram(int board_type)
{
	int   rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0;
	ulong size, max_size       = 0;
	ulong our_address;

	asm volatile ("move %0, $25" : "=r" (our_address) :);

		/* Can't probe for RAM size unless we are running from Flash.
		 */
	if (PHYSADDR(our_address) < PHYSADDR(PHYS_FLASH_1))
	{
		return max_sdram_size();
	}

	for (cols = 0x8; cols <= 0xC; cols++)
	{
		for (rows = 0xB; rows <= 0xD; rows++)
		{
			*INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
			                           (rows << 4) | cols;
			size = get_ram_size((ulong *)CFG_SDRAM_BASE,
			                                     max_sdram_size());

			if (size > max_size)
			{
				best_val = *INCA_IP_SDRAM_MC_CFGPB0;
				max_size = size;
			}
		}
	}

	*INCA_IP_SDRAM_MC_CFGPB0 = best_val;
	return max_size;
}

int checkboard (void)
{
#ifdef CONFIG_DISPLAY
	char str_ip[16];
#endif
	u32 *p;
	unsigned long chipid = *INCA_IP_WDT_CHIPID;
	int part_num;
#ifdef CONFIG_DISPLAY
	display_print("INCA-IP");
#endif
	puts ("Board: INCA-IP ");
	part_num = (chipid >> 12) & 0xffff;
	switch (part_num) {
	case 0xc0:
		printf ("Standard Version, ");
#ifdef CONFIG_DISPLAY
		display_print("s ");
#endif
		break;
	case 0xc1:
		printf ("Basic Version, ");
#ifdef CONFIG_DISPLAY
		display_print("c ");
#endif
		break;
	default:
		printf ("Unknown Part Number 0x%x ", part_num);
		break;
	}

	printf ("Chip V1.%ld, ", (chipid >> 28));
#ifdef CONFIG_DISPLAY
	display_printf("V1.%d", (chipid >> 28));
#endif

	printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
#ifdef CONFIG_DISPLAY
	display_printf("@%dMHz\n", incaip_get_cpuclk()/1000000);

	/* Print IP address on display */
	/* str_ip = malloc(16); */
	ip_to_string(getenv_IPaddr("ipaddr"), str_ip);
	display_print("IP ");
	display_print(str_ip);
	display_print("\n");
#endif

	printf("Watchdog aware version\n");
#ifdef CONFIG_UNCACHED
	printf("### Running uncached\n");
#endif
	p=((u32*)inca_watchdog_flag);
	if (*p != 0) {
		printf("\n### Watchdog Reset detected.\n");
		printf("### EPC=0x%08x EEPC=0x%08x\n\n",*(p+1),*(p+2));
		*p=0;
		*(p+1)=0;
		*(p+2)=0;
	}
	p=((u32*)inca_watchdog_nmisr);
	if ((*p & 0x00000004) != 0) {
		printf("\n### Watchdog Timer entered prewarn phase\n");
	}
	if ((*p & 0x00000002) != 0) {
		printf("\n### PLL NMI occured\n");
	}
	if ((*p & 0x00000001) != 0) {
		printf("\n### External NMI occured\n");
	}
	return 0;
}