📄 scan_divf_sinx2.map.rpt
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+-------------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------------------------+
; |scan_divf_sinx2 ; 109 (0) ; 17 ; 0 ; 11 ; 92 (0) ; 1 (0) ; 16 (0) ; 15 (0) ; |scan_divf_sinx2 ;
; |SCANCNT4B:u1| ; 4 (0) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |scan_divf_sinx2|SCANCNT4B:u1 ;
; |lpm_counter:CNT4_rtl_1| ; 4 (0) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |scan_divf_sinx2|SCANCNT4B:u1|lpm_counter:CNT4_rtl_1 ;
; |alt_counter_f10ke:wysi_counter| ; 4 (4) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 4 (4) ; |scan_divf_sinx2|SCANCNT4B:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter ;
; |divf:u2| ; 6 (2) ; 5 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 5 (1) ; 4 (0) ; |scan_divf_sinx2|divf:u2 ;
; |lpm_counter:CNT4_rtl_0| ; 4 (0) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |scan_divf_sinx2|divf:u2|lpm_counter:CNT4_rtl_0 ;
; |alt_counter_f10ke:wysi_counter| ; 4 (4) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 4 (4) ; |scan_divf_sinx2|divf:u2|lpm_counter:CNT4_rtl_0|alt_counter_f10ke:wysi_counter ;
; |singt4:u3| ; 99 (93) ; 8 ; 0 ; 0 ; 91 (85) ; 1 (1) ; 7 (7) ; 7 (1) ; |scan_divf_sinx2|singt4:u3 ;
; |lpm_add_sub:add_rtl_2| ; 6 (0) ; 0 ; 0 ; 0 ; 6 (0) ; 0 (0) ; 0 (0) ; 6 (0) ; |scan_divf_sinx2|singt4:u3|lpm_add_sub:add_rtl_2 ;
; |addcore:adder| ; 6 (1) ; 0 ; 0 ; 0 ; 6 (1) ; 0 (0) ; 0 (0) ; 6 (1) ; |scan_divf_sinx2|singt4:u3|lpm_add_sub:add_rtl_2|addcore:adder ;
; |a_csnbuffer:result_node| ; 5 (5) ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 5 (5) ; |scan_divf_sinx2|singt4:u3|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node ;
+-------------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 17 ;
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 4 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 4 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+---------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: divf:u2|lpm_counter:CNT4_rtl_0 ;
+------------------------+---------+----------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+---------+----------------------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 4 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; DEVICE_FAMILY ; FLEX10K ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+---------+----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SCANCNT4B:u1|lpm_counter:CNT4_rtl_1 ;
+------------------------+---------+---------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+---------+---------------------------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 4 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; DEVICE_FAMILY ; FLEX10K ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+---------+---------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: singt4:u3|lpm_add_sub:add_rtl_2 ;
+------------------------+-------------+-------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------+-------------------------------------------+
; LPM_WIDTH ; 7 ; Untyped ;
; LPM_REPRESENTATION ; UNSIGNED ; Untyped ;
; LPM_DIRECTION ; ADD ; Untyped ;
; ONE_INPUT_IS_CONSTANT ; YES ; Untyped ;
; LPM_PIPELINE ; 0 ; Untyped ;
; MAXIMIZE_SPEED ; 5 ; Untyped ;
; REGISTERED_AT_END ; 0 ; Untyped ;
; OPTIMIZE_FOR_SPEED ; 1 ; Untyped ;
; USE_CS_BUFFERS ; 1 ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; DEVICE_FAMILY ; FLEX10K ; Untyped ;
; USE_WYS ; OFF ; Untyped ;
; STYLE ; FAST ; Untyped ;
; CBXI_PARAMETER ; add_sub_enh ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
+------------------------+-------------+-------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in E:/EDA/DDS/10k844/scan_divf_sinx2/scan_divf_sinx2.map.eqn.
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
Info: Processing started: Fri Apr 14 22:17:37 2006
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off scan_divf_sinx2 -c scan_divf_sinx2
Info: Found 2 design units, including 1 entities, in source file scan_divf_sinx2.vhd
Info: Found design unit 1: scan_divf_sinx2-behav
Info: Found entity 1: scan_divf_sinx2
Info: Elaborating entity "scan_divf_sinx2" for the top level hierarchy
Info: Using design file SCANCNT4B.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: SCANCNT4B-behav
Info: Found entity 1: SCANCNT4B
Info: Elaborating entity "SCANCNT4B" for hierarchy "SCANCNT4B:u1"
Info: Using design file divf.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: divf-behav
Info: Found entity 1: divf
Info: Elaborating entity "divf" for hierarchy "divf:u2"
Info: Using design file singt4.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: singt4-behav
Info: Found entity 1: singt4
Info: Elaborating entity "singt4" for hierarchy "singt4:u3"
Info: VHDL Case Statement information at singt4.vhd(75): OTHERS choice is never selected
Info: Inferred 2 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "divf:u2|CNT4[0]~4"
Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "SCANCNT4B:u1|CNT4[0]~4"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf
Info: Found entity 1: alt_counter_f10ke
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_add_sub.tdf
Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/addcore.tdf
Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf
Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/altshift.tdf
Info: Found entity 1: altshift
Info: Implemented 120 device resources after synthesis - the final resource count might be different
Info: Implemented 2 input pins
Info: Implemented 9 output pins
Info: Implemented 109 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
Info: Processing ended: Fri Apr 14 22:17:48 2006
Info: Elapsed time: 00:00:12
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