dds_vhdl.hif

dds数字移相信号发生器,功能齐全通过验证

OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
}
# lmf
..|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_seg_state_machine
# storage
db|DDS_VHDL.(19).cnf
db|DDS_VHDL.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|sld_ela_control.vhd
c344b9ef4eed6f1fb9dd17ea42ba423
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(status)
3 downto 0
PARAMETER_STRING
USR
}
# lmf
..|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_post_trigger_counter
# storage
db|DDS_VHDL.(20).cnf
db|DDS_VHDL.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|sld_ela_control.vhd
c344b9ef4eed6f1fb9dd17ea42ba423
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
mem_address_bits
10
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
 constraint(trigger_position)
1 downto 0
PARAMETER_STRING
USR
}
# lmf
..|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|DDS_VHDL.(21).cnf
db|DDS_VHDL.(21).cnf
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|lpm_counter.tdf
64cb7c2bcdb5ca95ff73bae2b1378873
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
0
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
2
PARAMETER_SIGNED_DEC
USR
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_g9j
PARAMETER_UNKNOWN
USR
}
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
clock
-1
3
clk_en
-1
3
aset
-1
3
}
# include_file {
..|altera|71|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
..|altera|71|quartus|libraries|megafunctions|aglobal71.inc
80b63f71158cd1a01acf29ef94ccd6
..|altera|71|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
..|altera|71|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
..|altera|71|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
..|altera|71|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
..|altera|71|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
..|altera|71|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
..|altera|71|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
..|altera|71|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
..|altera|71|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
..|altera|71|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
..|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_g9j
# storage
db|DDS_VHDL.(22).cnf
db|DDS_VHDL.(22).cnf
# case_insensitive
# source_file
db|cntr_g9j.tdf
75dc8881b92359724b6aa3f2d7ff7773
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
clk_en
-1
3
aset
-1
3
}
# lmf
..|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_ela_segment_mgr
# storage
db|DDS_VHDL.(23).cnf
db|DDS_VHDL.(23).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|sld_ela_control.vhd
c344b9ef4eed6f1fb9dd17ea42ba423
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
mem_address_bits
10
PARAMETER_SIGNED_DEC
USR
sample_depth
1024
PARAMETER_SIGNED_DEC
USR
 constraint(segment_size_mask)
9 downto 0
PARAMETER_STRING
USR
}
# lmf
..|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|DDS_VHDL.(24).cnf
db|DDS_VHDL.(24).cnf
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|lpm_counter.tdf
64cb7c2bcdb5ca95ff73bae2b1378873
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
0
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
OFF
PARAMETER_UNKNOWN
USR
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_fii
PARAMETER_UNKNOWN
USR
}
# used_port {
sclr
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
clk_en
-1
2
}
# include_file {
..|altera|71|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
..|altera|71|quartus|libraries|megafunctions|aglobal71.inc
80b63f71158cd1a01acf29ef94ccd6
..|altera|71|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
..|altera|71|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
..|altera|71|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
..|altera|71|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
..|altera|71|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
..|altera|71|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
..|altera|71|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
..|altera|71|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
..|altera|71|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
..|altera|71|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
..|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_fii
# storage
db|DDS_VHDL.(25).cnf
db|DDS_VHDL.(25).cnf
# case_insensitive
# source_file
db|cntr_fii.tdf
4a8f8ee4eb95e8263f36ba81e276678
6
# used_port {
sclr
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
..|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_compare
# storage
db|DDS_VHDL.(26).cnf
db|DDS_VHDL.(26).cnf
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|lpm_compare.tdf
b3992a998ca8f3046d79452d635e191
6
# user_parameter {
lpm_width
10
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_SIGNED_DEC
USR
CHAIN_SIZE
8
PARAMETER_UNKNOWN
DEF
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
cmpr_fnh
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
aeb
-1
3
}
# include_file {
..|altera|71|quartus|libraries|megafunctions|aglobal71.inc
80b63f71158cd1a01acf29ef94ccd6
..|altera|71|quartus|libraries|megafunctions|comptree.inc
da21447b8e66c26bd34c85b6cdda8169
..|altera|71|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
}
# lmf
..|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cmpr_fnh
# storage
db|DDS_VHDL.(27).cnf
db|DDS_VHDL.(27).cnf
# case_insensitive
# source_file
db|cmpr_fnh.tdf
fc4d78449c737a2db3b3fd7834da35
6
# used_port {
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
aeb
-1
3
}
# lmf
..|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_acquisition_buffer
# storage
db|DDS_VHDL.(28).cnf
db|DDS_VHDL.(28).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|sld_acquisition_buffer.vhd
ec96415b73733464e8417a955a92e30
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
5
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
data_bits
18
PARAMETER_SIGNED_DEC
USR
buffer_depth
1024
PARAMETER_SIGNED_DEC
USR
mem_address_bits
10
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(status)
3 downto 0
PARAMETER_STRING
USR
 constraint(buffer_write_address)
9 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
9 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
9 downto 0
PARAMETER_STRING
USR
}
# lmf
..|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|DDS_VHDL.(29).cnf
db|DDS_VHDL.(29).cnf
# case_insensitive
# source_file
..|altera|71|quartus|libraries|megafunctions|lpm_counter.tdf
64cb7c2bcdb5ca95ff73bae2b1378873
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
1024
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
OFF
PARAMETER_UNKNOWN
USR
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_hek
PARAMETER_UNKNOWN
USR
}
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cout
-1
3
clock
-1
3
clk_en
-1
3
aclr
-1
3
}
# include_file {
..|altera|71|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
..|altera|71|quartus|libraries|megafunctions|aglobal71.inc
80b63f71158cd1a01acf29ef94ccd6
..|altera|71|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
..|altera|71|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
..|altera|71|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
..|altera|71|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
..|altera|71|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
..|altera|71|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
..|altera|71|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
..|altera|71|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
..|altera|71|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880