dds_vhdl.qsf

dds数字移相信号发生器,功能齐全通过验证

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		DDS_VHDL_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY DDS_VHDL
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:47:35  AUGUST 10, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 7.1
set_global_assignment -name VHDL_FILE ADDER32B.vhd
set_global_assignment -name VHDL_FILE ADDER10B.vhd
set_global_assignment -name VHDL_FILE REG32B.vhd
set_global_assignment -name VHDL_FILE REG10B.vhd
set_global_assignment -name VHDL_FILE sin_rom.vhd
set_global_assignment -name VHDL_FILE DDS_VHDL.vhd
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_location_assignment PIN_179 -to CLK
set_location_assignment PIN_1 -to PWORD[0]
set_location_assignment PIN_13 -to PWORD[7]
set_location_assignment PIN_12 -to PWORD[6]
set_location_assignment PIN_8 -to PWORD[5]
set_location_assignment PIN_6 -to PWORD[4]
set_location_assignment PIN_4 -to PWORD[3]
set_location_assignment PIN_3 -to PWORD[2]
set_location_assignment PIN_2 -to PWORD[1]
set_location_assignment PIN_240 -to FWORD[7]
set_location_assignment PIN_239 -to FWORD[6]
set_location_assignment PIN_238 -to FWORD[5]
set_location_assignment PIN_237 -to FWORD[4]
set_location_assignment PIN_236 -to FWORD[3]
set_location_assignment PIN_235 -to FWORD[2]
set_location_assignment PIN_234 -to FWORD[1]
set_location_assignment PIN_233 -to FWORD[0]
set_global_assignment -name SIGNALTAP_FILE stp1.stp
set_global_assignment -name ENABLE_SIGNALTAP ON
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_location_assignment PIN_79 -to FOUT[0]
set_location_assignment PIN_82 -to FOUT[1]
set_location_assignment PIN_78 -to FOUT[2]
set_location_assignment PIN_76 -to FOUT[3]
set_location_assignment PIN_75 -to FOUT[4]
set_location_assignment PIN_77 -to FOUT[5]
set_location_assignment PIN_73 -to FOUT[6]
set_location_assignment PIN_74 -to FOUT[7]
set_location_assignment PIN_67 -to FOUT[8]
set_location_assignment PIN_68 -to FOUT[9]
set_location_assignment PIN_86 -to POUT[9]
set_location_assignment PIN_85 -to POUT[8]
set_location_assignment PIN_88 -to POUT[7]
set_location_assignment PIN_87 -to POUT[6]
set_location_assignment PIN_93 -to POUT[5]
set_location_assignment PIN_94 -to POUT[4]
set_location_assignment PIN_95 -to POUT[3]
set_location_assignment PIN_98 -to POUT[2]
set_location_assignment PIN_99 -to POUT[1]
set_location_assignment PIN_100 -to POUT[0]
set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to CLK -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to FOUT[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to FOUT[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to FOUT[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to FOUT[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to FOUT[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to FOUT[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to FOUT[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to FOUT[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to FOUT[8] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to FOUT[9] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to FWORD[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to FWORD[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to FWORD[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to FWORD[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to FWORD[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to FWORD[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to FWORD[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to FWORD[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to POUT[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to POUT[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to POUT[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to POUT[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to POUT[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to POUT[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to POUT[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to POUT[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to POUT[8] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to POUT[9] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to PWORD[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to PWORD[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to PWORD[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to PWORD[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to PWORD[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to PWORD[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to PWORD[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to PWORD[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to FOUT[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to FOUT[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to FOUT[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to FOUT[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to FOUT[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to FOUT[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to FOUT[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to FOUT[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to FOUT[8] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to FOUT[9] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to FWORD[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to FWORD[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to FWORD[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to FWORD[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to FWORD[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to FWORD[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to FWORD[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to FWORD[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to POUT[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to POUT[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to POUT[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to POUT[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to POUT[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to POUT[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to POUT[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to POUT[7] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to POUT[8] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to POUT[9] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to PWORD[0] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to PWORD[1] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to PWORD[2] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to PWORD[3] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to PWORD[4] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to PWORD[5] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to PWORD[6] -section_id DDS_VHDL
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to PWORD[7] -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=36" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=36" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=671116801" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=127" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=34919" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=54087" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BIT_CNTR_BITS=6" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=1024" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_MEM_ADDRESS_BITS=10" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id DDS_VHDL
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id DDS_VHDL