📄 dds_vhdl.fit.summary
字号:
Fitter Status : Successful - Wed Sep 10 11:58:49 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : DDS_VHDL
Top-level Entity Name : DDS_VHDL
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Final
Total logic elements : 577 / 5,980 ( 10 % )
Total pins : 41 / 185 ( 22 % )
Total virtual pins : 0
Total memory bits : 57,344 / 92,160 ( 62 % )
Total PLLs : 0 / 2 ( 0 % )
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