prev_cmp_dds_vhdl.qmsg

dds数字移相信号发生器,功能齐全通过验证

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Sep 09 11:40:30 2008 " "Info: Processing started: Tue Sep 09 11:40:30 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off DDS_VHDL -c DDS_VHDL " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DDS_VHDL -c DDS_VHDL" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ADDER32B.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ADDER32B.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ADDER32B-behav " "Info: Found design unit 1: ADDER32B-behav" {  } { { "ADDER32B.vhd" "" { Text "C:/dds数字移相信号发生器/ADDER32B.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ADDER32B " "Info: Found entity 1: ADDER32B" {  } { { "ADDER32B.vhd" "" { Text "C:/dds数字移相信号发生器/ADDER32B.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ADDER10B.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ADDER10B.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ADDER10B-behav " "Info: Found design unit 1: ADDER10B-behav" {  } { { "ADDER10B.vhd" "" { Text "C:/dds数字移相信号发生器/ADDER10B.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ADDER10B " "Info: Found entity 1: ADDER10B" {  } { { "ADDER10B.vhd" "" { Text "C:/dds数字移相信号发生器/ADDER10B.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "REG32B.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file REG32B.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 REG32B-behav " "Info: Found design unit 1: REG32B-behav" {  } { { "REG32B.vhd" "" { Text "C:/dds数字移相信号发生器/REG32B.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 REG32B " "Info: Found entity 1: REG32B" {  } { { "REG32B.vhd" "" { Text "C:/dds数字移相信号发生器/REG32B.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "REG10B.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file REG10B.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 REG10B-behav " "Info: Found design unit 1: REG10B-behav" {  } { { "REG10B.vhd" "" { Text "C:/dds数字移相信号发生器/REG10B.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 REG10B " "Info: Found entity 1: REG10B" {  } { { "REG10B.vhd" "" { Text "C:/dds数字移相信号发生器/REG10B.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sin_rom.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file sin_rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sin_rom-SYN " "Info: Found design unit 1: sin_rom-SYN" {  } { { "sin_rom.vhd" "" { Text "C:/dds数字移相信号发生器/sin_rom.vhd" 52 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sin_rom " "Info: Found entity 1: sin_rom" {  } { { "sin_rom.vhd" "" { Text "C:/dds数字移相信号发生器/sin_rom.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DDS_VHDL.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file DDS_VHDL.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DDS_VHDL-one " "Info: Found design unit 1: DDS_VHDL-one" {  } { { "DDS_VHDL.vhd" "" { Text "C:/dds数字移相信号发生器/DDS_VHDL.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 DDS_VHDL " "Info: Found entity 1: DDS_VHDL" {  } { { "DDS_VHDL.vhd" "" { Text "C:/dds数字移相信号发生器/DDS_VHDL.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "DDS_VHDL " "Info: Elaborating entity \"DDS_VHDL\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ADDER32B ADDER32B:u1 " "Info: Elaborating entity \"ADDER32B\" for hierarchy \"ADDER32B:u1\"" {  } { { "DDS_VHDL.vhd" "u1" { Text "C:/dds数字移相信号发生器/DDS_VHDL.vhd" 47 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}