top.tan.rpt

来自「基于FPGA的多波形发生器 基于FPGA的多波形发生器」· RPT 代码 · 共 195 行 · 第 1/5 页

Timing Analyzer report for top
Tue Jun 19 17:25:45 2007
Version 4.1 Build 181 06/29/2004 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Timing Analyzer Settings
  3. Timing Analyzer Summary
  4. Clock Settings Summary
  5. Clock Setup: 'altera_internal_jtag~TCKUTAP'
  6. Clock Setup: 'clk2'
  7. Clock Setup: 'clk'
  8. Clock Hold: 'clk2'
  9. Clock Hold: 'clk'
 10. tsu
 11. tco
 12. tpd
 13. th
 14. Minimum tco
 15. Minimum tpd
 16. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2004 Altera Corporation
Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
support information,  device programming or simulation file,  and any other
associated  documentation or information  provided by  Altera  or a partner
under  Altera's   Megafunction   Partnership   Program  may  be  used  only
to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
other  use  of such  megafunction  design,  netlist,  support  information,
device programming or simulation file,  or any other  related documentation
or information  is prohibited  for  any  other purpose,  including, but not