boxingcunchu_hier_info

数字波形存储器VHDL源码

wraddress[4] => segment[0][0].WADDR4
wraddress[5] => segment[0][7].WADDR5
wraddress[5] => segment[0][6].WADDR5
wraddress[5] => segment[0][5].WADDR5
wraddress[5] => segment[0][4].WADDR5
wraddress[5] => segment[0][3].WADDR5
wraddress[5] => segment[0][2].WADDR5
wraddress[5] => segment[0][1].WADDR5
wraddress[5] => segment[0][0].WADDR5
wraddress[6] => segment[0][7].WADDR6
wraddress[6] => segment[0][6].WADDR6
wraddress[6] => segment[0][5].WADDR6
wraddress[6] => segment[0][4].WADDR6
wraddress[6] => segment[0][3].WADDR6
wraddress[6] => segment[0][2].WADDR6
wraddress[6] => segment[0][1].WADDR6
wraddress[6] => segment[0][0].WADDR6
wraddress[7] => segment[0][7].WADDR7
wraddress[7] => segment[0][6].WADDR7
wraddress[7] => segment[0][5].WADDR7
wraddress[7] => segment[0][4].WADDR7
wraddress[7] => segment[0][3].WADDR7
wraddress[7] => segment[0][2].WADDR7
wraddress[7] => segment[0][1].WADDR7
wraddress[7] => segment[0][0].WADDR7
wraddress[8] => segment[0][7].WADDR8
wraddress[8] => segment[0][6].WADDR8
wraddress[8] => segment[0][5].WADDR8
wraddress[8] => segment[0][4].WADDR8
wraddress[8] => segment[0][3].WADDR8
wraddress[8] => segment[0][2].WADDR8
wraddress[8] => segment[0][1].WADDR8
wraddress[8] => segment[0][0].WADDR8
wraddress[9] => segment[0][7].WADDR9
wraddress[9] => segment[0][6].WADDR9
wraddress[9] => segment[0][5].WADDR9
wraddress[9] => segment[0][4].WADDR9
wraddress[9] => segment[0][3].WADDR9
wraddress[9] => segment[0][2].WADDR9
wraddress[9] => segment[0][1].WADDR9
wraddress[9] => segment[0][0].WADDR9
wraddress[10] => segment[0][7].WADDR10
wraddress[10] => segment[0][6].WADDR10
wraddress[10] => segment[0][5].WADDR10
wraddress[10] => segment[0][4].WADDR10
wraddress[10] => segment[0][3].WADDR10
wraddress[10] => segment[0][2].WADDR10
wraddress[10] => segment[0][1].WADDR10
wraddress[10] => segment[0][0].WADDR10
inclock => segment[0][7].CLK0
inclock => segment[0][6].CLK0
inclock => segment[0][5].CLK0
inclock => segment[0][4].CLK0
inclock => segment[0][3].CLK0
inclock => segment[0][2].CLK0
inclock => segment[0][1].CLK0
inclock => segment[0][0].CLK0
rden => segment[0][7].RE
rden => segment[0][6].RE
rden => segment[0][5].RE
rden => segment[0][4].RE
rden => segment[0][3].RE
rden => segment[0][2].RE
rden => segment[0][1].RE
rden => segment[0][0].RE
rdaddress[0] => segment[0][7].RADDR
rdaddress[0] => segment[0][6].RADDR
rdaddress[0] => segment[0][5].RADDR
rdaddress[0] => segment[0][4].RADDR
rdaddress[0] => segment[0][3].RADDR
rdaddress[0] => segment[0][2].RADDR
rdaddress[0] => segment[0][1].RADDR
rdaddress[0] => segment[0][0].RADDR
rdaddress[1] => segment[0][7].RADDR1
rdaddress[1] => segment[0][6].RADDR1
rdaddress[1] => segment[0][5].RADDR1
rdaddress[1] => segment[0][4].RADDR1
rdaddress[1] => segment[0][3].RADDR1
rdaddress[1] => segment[0][2].RADDR1
rdaddress[1] => segment[0][1].RADDR1
rdaddress[1] => segment[0][0].RADDR1
rdaddress[2] => segment[0][7].RADDR2
rdaddress[2] => segment[0][6].RADDR2
rdaddress[2] => segment[0][5].RADDR2
rdaddress[2] => segment[0][4].RADDR2
rdaddress[2] => segment[0][3].RADDR2
rdaddress[2] => segment[0][2].RADDR2
rdaddress[2] => segment[0][1].RADDR2
rdaddress[2] => segment[0][0].RADDR2
rdaddress[3] => segment[0][7].RADDR3
rdaddress[3] => segment[0][6].RADDR3
rdaddress[3] => segment[0][5].RADDR3
rdaddress[3] => segment[0][4].RADDR3
rdaddress[3] => segment[0][3].RADDR3
rdaddress[3] => segment[0][2].RADDR3
rdaddress[3] => segment[0][1].RADDR3
rdaddress[3] => segment[0][0].RADDR3
rdaddress[4] => segment[0][7].RADDR4
rdaddress[4] => segment[0][6].RADDR4
rdaddress[4] => segment[0][5].RADDR4
rdaddress[4] => segment[0][4].RADDR4
rdaddress[4] => segment[0][3].RADDR4
rdaddress[4] => segment[0][2].RADDR4
rdaddress[4] => segment[0][1].RADDR4
rdaddress[4] => segment[0][0].RADDR4
rdaddress[5] => segment[0][7].RADDR5
rdaddress[5] => segment[0][6].RADDR5
rdaddress[5] => segment[0][5].RADDR5
rdaddress[5] => segment[0][4].RADDR5
rdaddress[5] => segment[0][3].RADDR5
rdaddress[5] => segment[0][2].RADDR5
rdaddress[5] => segment[0][1].RADDR5
rdaddress[5] => segment[0][0].RADDR5
rdaddress[6] => segment[0][7].RADDR6
rdaddress[6] => segment[0][6].RADDR6
rdaddress[6] => segment[0][5].RADDR6
rdaddress[6] => segment[0][4].RADDR6
rdaddress[6] => segment[0][3].RADDR6
rdaddress[6] => segment[0][2].RADDR6
rdaddress[6] => segment[0][1].RADDR6
rdaddress[6] => segment[0][0].RADDR6
rdaddress[7] => segment[0][7].RADDR7
rdaddress[7] => segment[0][6].RADDR7
rdaddress[7] => segment[0][5].RADDR7
rdaddress[7] => segment[0][4].RADDR7
rdaddress[7] => segment[0][3].RADDR7
rdaddress[7] => segment[0][2].RADDR7
rdaddress[7] => segment[0][1].RADDR7
rdaddress[7] => segment[0][0].RADDR7
rdaddress[8] => segment[0][7].RADDR8
rdaddress[8] => segment[0][6].RADDR8
rdaddress[8] => segment[0][5].RADDR8
rdaddress[8] => segment[0][4].RADDR8
rdaddress[8] => segment[0][3].RADDR8
rdaddress[8] => segment[0][2].RADDR8
rdaddress[8] => segment[0][1].RADDR8
rdaddress[8] => segment[0][0].RADDR8
rdaddress[9] => segment[0][7].RADDR9
rdaddress[9] => segment[0][6].RADDR9
rdaddress[9] => segment[0][5].RADDR9
rdaddress[9] => segment[0][4].RADDR9
rdaddress[9] => segment[0][3].RADDR9
rdaddress[9] => segment[0][2].RADDR9
rdaddress[9] => segment[0][1].RADDR9
rdaddress[9] => segment[0][0].RADDR9
rdaddress[10] => segment[0][7].RADDR10
rdaddress[10] => segment[0][6].RADDR10
rdaddress[10] => segment[0][5].RADDR10
rdaddress[10] => segment[0][4].RADDR10
rdaddress[10] => segment[0][3].RADDR10
rdaddress[10] => segment[0][2].RADDR10
rdaddress[10] => segment[0][1].RADDR10
rdaddress[10] => segment[0][0].RADDR10
outclock => segment[0][7].CLK1
outclock => segment[0][6].CLK1
outclock => segment[0][5].CLK1
outclock => segment[0][4].CLK1
outclock => segment[0][3].CLK1
outclock => segment[0][2].CLK1
outclock => segment[0][1].CLK1
outclock => segment[0][0].CLK1
q[0] <= segment[0][0].DATAOUT
q[1] <= segment[0][1].DATAOUT
q[2] <= segment[0][2].DATAOUT
q[3] <= segment[0][3].DATAOUT
q[4] <= segment[0][4].DATAOUT
q[5] <= segment[0][5].DATAOUT
q[6] <= segment[0][6].DATAOUT
q[7] <= segment[0][7].DATAOUT


|boxingcunchu|latch_11:inst2
data[0] => lpm_latch:lpm_latch_component.data[0]
data[1] => lpm_latch:lpm_latch_component.data[1]
data[2] => lpm_latch:lpm_latch_component.data[2]
data[3] => lpm_latch:lpm_latch_component.data[3]
data[4] => lpm_latch:lpm_latch_component.data[4]
data[5] => lpm_latch:lpm_latch_component.data[5]
data[6] => lpm_latch:lpm_latch_component.data[6]
data[7] => lpm_latch:lpm_latch_component.data[7]
data[8] => lpm_latch:lpm_latch_component.data[8]
data[9] => lpm_latch:lpm_latch_component.data[9]
data[10] => lpm_latch:lpm_latch_component.data[10]
gate => lpm_latch:lpm_latch_component.gate
q[0] <= lpm_latch:lpm_latch_component.q[0]
q[1] <= lpm_latch:lpm_latch_component.q[1]
q[2] <= lpm_latch:lpm_latch_component.q[2]
q[3] <= lpm_latch:lpm_latch_component.q[3]
q[4] <= lpm_latch:lpm_latch_component.q[4]
q[5] <= lpm_latch:lpm_latch_component.q[5]
q[6] <= lpm_latch:lpm_latch_component.q[6]
q[7] <= lpm_latch:lpm_latch_component.q[7]
q[8] <= lpm_latch:lpm_latch_component.q[8]
q[9] <= lpm_latch:lpm_latch_component.q[9]
q[10] <= lpm_latch:lpm_latch_component.q[10]


|boxingcunchu|latch_11:inst2|lpm_latch:lpm_latch_component
data[0] => latches[0].DATAIN
data[1] => latches[1].DATAIN
data[2] => latches[2].DATAIN
data[3] => latches[3].DATAIN
data[4] => latches[4].DATAIN
data[5] => latches[5].DATAIN
data[6] => latches[6].DATAIN
data[7] => latches[7].DATAIN
data[8] => latches[8].DATAIN
data[9] => latches[9].DATAIN
data[10] => latches[10].DATAIN
gate => latches[10].LATCH_ENABLE
gate => latches[9].LATCH_ENABLE
gate => latches[8].LATCH_ENABLE
gate => latches[7].LATCH_ENABLE
gate => latches[6].LATCH_ENABLE
gate => latches[5].LATCH_ENABLE
gate => latches[4].LATCH_ENABLE
gate => latches[3].LATCH_ENABLE
gate => latches[2].LATCH_ENABLE
gate => latches[1].LATCH_ENABLE
gate => latches[0].LATCH_ENABLE
q[0] <= latches[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= latches[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= latches[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= latches[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= latches[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= latches[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= latches[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= latches[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= latches[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= latches[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= latches[10].DB_MAX_OUTPUT_PORT_TYPE


|boxingcunchu|counter_8:inst4
clock => lpm_counter:lpm_counter_component.clock
sclr => lpm_counter:lpm_counter_component.sclr
q[0] <= lpm_counter:lpm_counter_component.q[0]
q[1] <= lpm_counter:lpm_counter_component.q[1]
q[2] <= lpm_counter:lpm_counter_component.q[2]
q[3] <= lpm_counter:lpm_counter_component.q[3]
q[4] <= lpm_counter:lpm_counter_component.q[4]
q[5] <= lpm_counter:lpm_counter_component.q[5]
q[6] <= lpm_counter:lpm_counter_component.q[6]
q[7] <= lpm_counter:lpm_counter_component.q[7]
q[8] <= lpm_counter:lpm_counter_component.q[8]
q[9] <= lpm_counter:lpm_counter_component.q[9]
q[10] <= lpm_counter:lpm_counter_component.q[10]
cout <= lpm_counter:lpm_counter_component.cout


|boxingcunchu|counter_8:inst4|lpm_counter:lpm_counter_component
clock => alt_counter_f10ke:wysi_counter.clock
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
q[5] <= alt_counter_f10ke:wysi_counter.q[5]
q[6] <= alt_counter_f10ke:wysi_counter.q[6]
q[7] <= alt_counter_f10ke:wysi_counter.q[7]
q[8] <= alt_counter_f10ke:wysi_counter.q[8]
q[9] <= alt_counter_f10ke:wysi_counter.q[9]
q[10] <= alt_counter_f10ke:wysi_counter.q[10]
cout <= alt_counter_f10ke:wysi_counter.cout


|boxingcunchu|counter_8:inst4|lpm_counter:lpm_counter_component|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
data[2] => counter_cell[2].DATAC
data[3] => counter_cell[3].DATAC
data[4] => counter_cell[4].DATAC
data[5] => counter_cell[5].DATAC
data[6] => counter_cell[6].DATAC
data[7] => counter_cell[7].DATAC
data[8] => counter_cell[8].DATAC
data[9] => counter_cell[9].DATAC
data[10] => counter_cell[10].DATAC
clock => counter_cell[10].CLK
clock => counter_cell[9].CLK
clock => counter_cell[8].CLK
clock => counter_cell[7].CLK
clock => counter_cell[6].CLK
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
q[5] <= counter_cell[5].REGOUT
q[6] <= counter_cell[6].REGOUT
q[7] <= counter_cell[7].REGOUT
q[8] <= counter_cell[8].REGOUT
q[9] <= counter_cell[9].REGOUT
q[10] <= counter_cell[10].REGOUT
cout <= cout_bit.COMBOUT


|boxingcunchu|latch_11:inst1
data[0] => lpm_latch:lpm_latch_component.data[0]
data[1] => lpm_latch:lpm_latch_component.data[1]
data[2] => lpm_latch:lpm_latch_component.data[2]
data[3] => lpm_latch:lpm_latch_component.data[3]
data[4] => lpm_latch:lpm_latch_component.data[4]
data[5] => lpm_latch:lpm_latch_component.data[5]
data[6] => lpm_latch:lpm_latch_component.data[6]
data[7] => lpm_latch:lpm_latch_component.data[7]
data[8] => lpm_latch:lpm_latch_component.data[8]
data[9] => lpm_latch:lpm_latch_component.data[9]
data[10] => lpm_latch:lpm_latch_component.data[10]
gate => lpm_latch:lpm_latch_component.gate
q[0] <= lpm_latch:lpm_latch_component.q[0]
q[1] <= lpm_latch:lpm_latch_component.q[1]
q[2] <= lpm_latch:lpm_latch_component.q[2]
q[3] <= lpm_latch:lpm_latch_component.q[3]
q[4] <= lpm_latch:lpm_latch_component.q[4]
q[5] <= lpm_latch:lpm_latch_component.q[5]
q[6] <= lpm_latch:lpm_latch_component.q[6]
q[7] <= lpm_latch:lpm_latch_component.q[7]
q[8] <= lpm_latch:lpm_latch_component.q[8]
q[9] <= lpm_latch:lpm_latch_component.q[9]
q[10] <= lpm_latch:lpm_latch_component.q[10]


|boxingcunchu|latch_11:inst1|lpm_latch:lpm_latch_component
data[0] => latches[0].DATAIN
data[1] => latches[1].DATAIN
data[2] => latches[2].DATAIN
data[3] => latches[3].DATAIN
data[4] => latches[4].DATAIN
data[5] => latches[5].DATAIN
data[6] => latches[6].DATAIN
data[7] => latches[7].DATAIN
data[8] => latches[8].DATAIN
data[9] => latches[9].DATAIN
data[10] => latches[10].DATAIN
gate => latches[10].LATCH_ENABLE
gate => latches[9].LATCH_ENABLE
gate => latches[8].LATCH_ENABLE
gate => latches[7].LATCH_ENABLE
gate => latches[6].LATCH_ENABLE
gate => latches[5].LATCH_ENABLE
gate => latches[4].LATCH_ENABLE
gate => latches[3].LATCH_ENABLE
gate => latches[2].LATCH_ENABLE
gate => latches[1].LATCH_ENABLE
gate => latches[0].LATCH_ENABLE
q[0] <= latches[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= latches[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= latches[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= latches[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= latches[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= latches[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= latches[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= latches[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= latches[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= latches[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= latches[10].DB_MAX_OUTPUT_PORT_TYPE


|boxingcunchu|counter_2048:inst5
clock => lpm_counter:lpm_counter_component.clock
sclr => lpm_counter:lpm_counter_component.sclr
q[0] <= lpm_counter:lpm_counter_component.q[0]
q[1] <= lpm_counter:lpm_counter_component.q[1]
q[2] <= lpm_counter:lpm_counter_component.q[2]
q[3] <= lpm_counter:lpm_counter_component.q[3]
q[4] <= lpm_counter:lpm_counter_component.q[4]
q[5] <= lpm_counter:lpm_counter_component.q[5]
q[6] <= lpm_counter:lpm_counter_component.q[6]
q[7] <= lpm_counter:lpm_counter_component.q[7]
q[8] <= lpm_counter:lpm_counter_component.q[8]
q[9] <= lpm_counter:lpm_counter_component.q[9]
q[10] <= lpm_counter:lpm_counter_component.q[10]
cout <= lpm_counter:lpm_counter_component.cout


|boxingcunchu|counter_2048:inst5|lpm_counter:lpm_counter_component
clock => alt_counter_f10ke:wysi_counter.clock
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
q[5] <= alt_counter_f10ke:wysi_counter.q[5]
q[6] <= alt_counter_f10ke:wysi_counter.q[6]
q[7] <= alt_counter_f10ke:wysi_counter.q[7]
q[8] <= alt_counter_f10ke:wysi_counter.q[8]
q[9] <= alt_counter_f10ke:wysi_counter.q[9]
q[10] <= alt_counter_f10ke:wysi_counter.q[10]
cout <= alt_counter_f10ke:wysi_counter.cout


|boxingcunchu|counter_2048:inst5|lpm_counter:lpm_counter_component|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
data[2] => counter_cell[2].DATAC
data[3] => counter_cell[3].DATAC
data[4] => counter_cell[4].DATAC
data[5] => counter_cell[5].DATAC
data[6] => counter_cell[6].DATAC
data[7] => counter_cell[7].DATAC
data[8] => counter_cell[8].DATAC
data[9] => counter_cell[9].DATAC
data[10] => counter_cell[10].DATAC
clock => counter_cell[10].CLK
clock => counter_cell[9].CLK
clock => counter_cell[8].CLK
clock => counter_cell[7].CLK
clock => counter_cell[6].CLK
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
q[5] <= counter_cell[5].REGOUT
q[6] <= counter_cell[6].REGOUT
q[7] <= counter_cell[7].REGOUT
q[8] <= counter_cell[8].REGOUT
q[9] <= counter_cell[9].REGOUT
q[10] <= counter_cell[10].REGOUT
cout <= cout_bit.COMBOUT