main.stp

基于FPGA的VHDL编程实现各种音频信号

NOTE "CREATOR" "Designer Version: 8.0.3.7";
NOTE "DEVICE" "AFS600";
NOTE "PACKAGE" "AFS600-FG256";
NOTE "DATE" "2008/02/22";
NOTE "STAPL_VERSION" "JESD71";
NOTE "IDCODE" "033261CF";
NOTE "DESIGN" "main";
NOTE "CHECKSUM" "E9A8";
NOTE "SAVE_DATA" "FRomStream";
NOTE "SECURITY" "Disable";
NOTE "ALG_VERSION" "15";
NOTE "MAP_VERSION" "1";
NOTE "TOOL_VERSION" "1";
NOTE "MAX_FREQ" "20000000";
NOTE "SILSIG" "00000000";
NOTE "DIRECTC_VERSION" "100";
NOTE "TRACKING_SAR" "67422";
NOTE "SPEED_GRAD" "-2";
NOTE "TEMP_GRAD" "COM";
NOTE "PRG_BSR_SET_IO" "Z";


ACTION PROGRAM =
                W_INITIALIZE,
                DO_ERASE,
                DO_PROGRAM,
                DO_VERIFY_BOL,
                DO_PROGRAM_RLOCK,
                DO_EXIT;
ACTION PROGRAM_ARRAY =
                AW_INITIALIZE,
                DO_ERASE_ARRAY,
                DO_PROGRAM,
                DO_VERIFY_BOL,
                DO_PROGRAM_RLOCK,
                DO_EXIT;
ACTION ERASE_ARRAY = 
                AW_INITIALIZE,
                DO_ERASE_ARRAY_ONLY,
                DO_EXIT;
ACTION ERASE = 
                W_INITIALIZE,
                DO_ERASE_ONLY,
                DO_EXIT;
ACTION ERASE_ALL = 
                INITIALIZE,
                DO_ERASE_ALL,
                DO_EXIT;
ACTION VERIFY = 
                R_INITIALIZE,
                DO_VERIFY_EOL,
                DO_EXIT;
ACTION VERIFY_ARRAY = 
                AR_INITIALIZE,
                DO_VERIFY_EOL,
                DO_EXIT;
ACTION READ_IDCODE = DO_READ_IDCODE;
ACTION VERIFY_DEVICE_INFO = 
                READ_INITIALIZE,
                PROC_READ_IDCODE,
                DO_VERIFY_DEVICE_INFO,
                DO_EXIT;
ACTION DEVICE_INFO = 
                READ_INITIALIZE,
                PROC_READ_IDCODE,
                DO_DEVICE_INFO, 
                DO_QUERY_SECURITY,
                DO_EXIT;

DATA PARAMETERS;
INTEGER freq = 4;
ENDDATA;

DATA GV;
' Generic Buffers.
BOOLEAN Buff128[128];
BOOLEAN Buff32[32];
INTEGER IDRev;

INTEGER i;
INTEGER j;
INTEGER SDNumber;
INTEGER RowNumber;
INTEGER DataIndex=0;
INTEGER FRomRowNumber=1;
INTEGER AESBlock;

BOOLEAN ID[32];
BOOLEAN PASS = 1;
INTEGER STATUS = 0;
BOOLEAN SECURITY_PASS = 0;

BOOLEAN SILSIG[32] = $00000000;
BOOLEAN ISC_Config_Result[18];
BOOLEAN VERIFY_EOL[2];
BOOLEAN CombEraseSelect[23];

' signal to display cycle count in PROC_DISPLAY_UROW;
BOOLEAN FLAG_DISPLAY_CYC = 0;

' Set to 1 of need to check for security key
BOOLEAN SECKEY_CHK = 0;
BOOLEAN SECKEY_OK =1;
BOOLEAN SecReg[56];
BOOLEAN NVMC0 = 0;
BOOLEAN NVMW0 = 0;
BOOLEAN NVMR0 = 0;
BOOLEAN NVMC1 = 0;
BOOLEAN NVMW1 = 0;
BOOLEAN NVMR1 = 0;
BOOLEAN NVMC2 = 0;
BOOLEAN NVMW2 = 0;
BOOLEAN NVMR2 = 0;
BOOLEAN NVMC3 = 0;
BOOLEAN NVMW3 = 0;
BOOLEAN NVMR3 = 0;

BOOLEAN ULUWE = 0;
BOOLEAN ULARE = 0;
BOOLEAN ULUPC = 0;
BOOLEAN ULUFE = 0;
BOOLEAN ULUFP = 0;
BOOLEAN ULUFJ = 0;
BOOLEAN ULFLR = 0;
BOOLEAN ULULR = 0;
BOOLEAN ULAWE = 0;
BOOLEAN ULARD = 0;
BOOLEAN ULOPT[2];

''''''''''''''''''''''''''''''''''''''''''
' Reserved Variable names for ACTEL STAPL file used by programming 
' tools to modify the UROW fields. This is possible because UROW 
' field is does not have security support.
'
' Design Checksum in UROW
' Displayed by Display Device Info Action
BOOLEAN sUROW_CHECKSUM[16];

' Cycle Counter
' increment by one for every FPGA Array programming
INTEGER ACT_UROW_CYCLE_COUNT = 0;
INTEGER sUROW_CYCLE_COUNT = 0;

' Design Name
' 10 7-bit characters
BOOLEAN ACT_UROW_DESIGN_NAME[70] = $01020408102B70E5BB;
BOOLEAN sUROW_DESIGN_NAME[70];

'Programming Method
' 000 ------ IEEE1532
' 001 ------ STAPL
' 010 ------ DirectC
' 011 ------ PDB
' 111 ------ default
BOOLEAN ACT_UROW_PROG_METHOD[3] = #001;
BOOLEAN sUROW_PROG_METHOD[3];

'Programming Algorithm Version
BOOLEAN ACT_UROW_ALGO_VERSION[4] = #1111;
BOOLEAN sUROW_ALGO_VERSION[4];

'Device Package Type
'000000 ------ Package type not specified
'000001 ------ QN132/QNG132
'000010 ------ VQ100/VQG100
'000011 ------ TQ100/TQG144  
'000100 ------ PQ208/PQG208
'000101 ------ FG144/FGG144
'000110 ------ FG256/FGG256
'000111 ------ FG484/FGG484
'001000 ------ FG676/FGG676
'001001 ------ FG896/FGG896
'001010 ------ QN108/QNG108
'001011 ------ QN180/QNG180
'001100 ------ TQ100/TQG100
'001101 ------ CQ208/CQG208
'001110 ------ FG1152/FGG1152
'001111 ------ BG456/BGG456
'111111 ------ Package type not specified
BOOLEAN sUROW_PKG_TYPE[6];

'Programming Software Version
BOOLEAN ACT_UROW_SW_VERSION[7];
BOOLEAN sUROW_SW_VERSION[7];

'BP Programming Software Version
INTEGER PLAYER_VERSION_VARIABLE = 0;
INTEGER SCULPTOR_MAJOR_BASE = 4;
INTEGER SCULPTOR_MINOR_BASE = 50;

'Programmer
'0000 ------ FlashPro SW with FlashPro
'0001 ------ FlashPro SW with FlashPro Lite
'0010 ------ FlashPro SW with FlashPro3
'0011 ------ Sculptor WIN  
'0100 ------ BP Win
'0101 ------ DirectC
'0110 ------ Actel JAM player
'1111 ------ default
BOOLEAN ACT_UROW_PROGRAM_SW[4] = #1111;
BOOLEAN sUROW_PROGRAM_SW[4];

'Device Speed Grade
'000 ------ Not specified
'001 ------ -1
'010 ------ -2
'011 ------ -3
'100 ------ -F
'101 ------ STD
'110 ------ -4
'111 ------ Not specified
BOOLEAN sUROW_SPEED_GRADE[3];

BOOLEAN sUROW_SRAM_DISTURB[1];

BOOLEAN IsEraseOnly = 0;