box.fit.eqn

用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。

Q1[5] = DFFEAS(Q1[5]_lut_out, GLOBAL(NB1__clk0), VCC, , , ~GND, , , A1L142);

--A1L157 is Q1[5]~493 at LC_X16_Y7_N5
--operation mode is arithmetic

A1L157_cout_0 = !A1L153 # !Q1[5];
A1L157 = CARRY(A1L157_cout_0);

--A1L158 is Q1[5]~493COUT1_509 at LC_X16_Y7_N5
--operation mode is arithmetic

A1L158_cout_1 = !A1L153 # !Q1[5];
A1L158 = CARRY(A1L158_cout_1);


--Q1[6] is Q1[6] at LC_X16_Y7_N6
--operation mode is arithmetic

Q1[6]_carry_eqn = (!A1L153 & A1L157) # (A1L153 & A1L158);
Q1[6]_lut_out = Q1[6] $ (!Q1[6]_carry_eqn);
Q1[6] = DFFEAS(Q1[6]_lut_out, GLOBAL(NB1__clk0), VCC, , , DS0, , , A1L142);

--A1L160 is Q1[6]~497 at LC_X16_Y7_N6
--operation mode is arithmetic

A1L160_cout_0 = Q1[6] & (!A1L157);
A1L160 = CARRY(A1L160_cout_0);

--A1L161 is Q1[6]~497COUT1_510 at LC_X16_Y7_N6
--operation mode is arithmetic

A1L161_cout_1 = Q1[6] & (!A1L158);
A1L161 = CARRY(A1L161_cout_1);


--Q1[7] is Q1[7] at LC_X16_Y7_N7
--operation mode is normal

Q1[7]_carry_eqn = (!A1L153 & A1L160) # (A1L153 & A1L161);
Q1[7]_lut_out = Q1[7] $ (Q1[7]_carry_eqn);
Q1[7] = DFFEAS(Q1[7]_lut_out, GLOBAL(NB1__clk0), VCC, , , DS1, , , A1L142);


--MB1_ram_rom_data_reg[0] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] at LC_X21_Y7_N1
--operation mode is normal

MB1_ram_rom_data_reg[0] = AMPP_FUNCTION(A1L5, LB1_q_b[0], MB1_ram_rom_data_reg[1], MB1L13, VCC, MB1L50);


--MB1_ram_rom_addr_reg[0] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] at LC_X20_Y8_N0
--operation mode is arithmetic

MB1_ram_rom_addr_reg[0] = AMPP_FUNCTION(A1L5, MB1_ram_rom_incr_addr, MB1_ram_rom_addr_reg[0], MB1_ram_rom_addr_reg[1], !FB5_Q[0], MB1L12);

--MB1L19 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~121 at LC_X20_Y8_N0
--operation mode is arithmetic

MB1L19 = AMPP_FUNCTION(MB1_ram_rom_incr_addr, MB1_ram_rom_addr_reg[0]);

--MB1L20 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~121COUT1_153 at LC_X20_Y8_N0
--operation mode is arithmetic

MB1L20 = AMPP_FUNCTION(MB1_ram_rom_incr_addr, MB1_ram_rom_addr_reg[0]);


--MB1_ram_rom_addr_reg[1] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] at LC_X20_Y8_N1
--operation mode is arithmetic

MB1_ram_rom_addr_reg[1] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[1], MB1_ram_rom_addr_reg[2], !FB5_Q[0], MB1L12, MB1L19, MB1L20);

--MB1L22 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~125 at LC_X20_Y8_N1
--operation mode is arithmetic

MB1L22 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[1], MB1L19);

--MB1L23 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~125COUT1_154 at LC_X20_Y8_N1
--operation mode is arithmetic

MB1L23 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[1], MB1L20);


--MB1_ram_rom_addr_reg[2] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] at LC_X20_Y8_N2
--operation mode is arithmetic

MB1_ram_rom_addr_reg[2] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[2], MB1_ram_rom_addr_reg[3], !FB5_Q[0], MB1L12, MB1L22, MB1L23);

--MB1L25 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~129 at LC_X20_Y8_N2
--operation mode is arithmetic

MB1L25 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[2], MB1L22);

--MB1L26 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~129COUT1_155 at LC_X20_Y8_N2
--operation mode is arithmetic

MB1L26 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[2], MB1L23);


--MB1_ram_rom_addr_reg[3] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] at LC_X20_Y8_N3
--operation mode is arithmetic

MB1_ram_rom_addr_reg[3] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[3], MB1_ram_rom_addr_reg[4], !FB5_Q[0], MB1L12, MB1L25, MB1L26);

--MB1L28 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~133 at LC_X20_Y8_N3
--operation mode is arithmetic

MB1L28 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[3], MB1L25);

--MB1L29 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~133COUT1 at LC_X20_Y8_N3
--operation mode is arithmetic

MB1L29 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[3], MB1L26);


--MB1_ram_rom_addr_reg[4] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] at LC_X20_Y8_N4
--operation mode is arithmetic

MB1_ram_rom_addr_reg[4] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[4], MB1_ram_rom_addr_reg[5], !FB5_Q[0], MB1L12, MB1L28, MB1L29);

--MB1L31 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]~137 at LC_X20_Y8_N4
--operation mode is arithmetic

MB1L31 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[4], MB1L28, MB1L29);


--MB1_ram_rom_addr_reg[5] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] at LC_X20_Y8_N5
--operation mode is arithmetic

MB1_ram_rom_addr_reg[5] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[5], MB1_ram_rom_addr_reg[6], !FB5_Q[0], MB1L12, MB1L31);

--MB1L35 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]~141 at LC_X20_Y8_N5
--operation mode is arithmetic

MB1L35 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[5]);

--MB1L36 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]~141COUT1_156 at LC_X20_Y8_N5
--operation mode is arithmetic

MB1L36 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[5]);


--MB1_ram_rom_addr_reg[6] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] at LC_X20_Y8_N6
--operation mode is arithmetic

MB1_ram_rom_addr_reg[6] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[6], MB1_ram_rom_addr_reg[7], !FB5_Q[0], MB1L12, MB1L31, MB1L35, MB1L36);

--MB1L38 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]~145 at LC_X20_Y8_N6
--operation mode is arithmetic

MB1L38 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[6], MB1L35);

--MB1L39 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]~145COUT1_157 at LC_X20_Y8_N6
--operation mode is arithmetic

MB1L39 = AMPP_FUNCTION(MB1_ram_rom_addr_reg[6], MB1L36);


--MB1_ram_rom_addr_reg[7] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] at LC_X20_Y8_N7
--operation mode is normal

MB1_ram_rom_addr_reg[7] = AMPP_FUNCTION(A1L5, MB1_ram_rom_addr_reg[7], altera_internal_jtag, !FB5_Q[0], MB1L12, MB1L31, MB1L38, MB1L39);


--MB1_ram_rom_data_reg[1] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] at LC_X19_Y8_N5
--operation mode is normal

MB1_ram_rom_data_reg[1] = AMPP_FUNCTION(A1L5, MB1_ram_rom_data_reg[2], MB1L13, LB1_q_b[1], VCC, MB1L50);


--MB1_ram_rom_data_reg[2] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] at LC_X19_Y8_N6
--operation mode is normal

MB1_ram_rom_data_reg[2] = AMPP_FUNCTION(A1L5, MB1L13, MB1_ram_rom_data_reg[3], LB1_q_b[2], VCC, MB1L50);


--MB1_ram_rom_data_reg[3] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] at LC_X19_Y8_N4
--operation mode is normal

MB1_ram_rom_data_reg[3] = AMPP_FUNCTION(A1L5, LB1_q_b[3], MB1_ram_rom_data_reg[4], MB1L13, VCC, MB1L50);


--MB1_ram_rom_data_reg[4] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] at LC_X19_Y8_N3
--operation mode is normal

MB1_ram_rom_data_reg[4] = AMPP_FUNCTION(A1L5, MB1L13, MB1_ram_rom_data_reg[5], LB1_q_b[4], VCC, MB1L50);


--MB1_ram_rom_data_reg[5] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] at LC_X19_Y8_N8
--operation mode is normal

MB1_ram_rom_data_reg[5] = AMPP_FUNCTION(A1L5, MB1_ram_rom_data_reg[6], MB1L13, LB1_q_b[5], VCC, MB1L50);


--MB1_ram_rom_data_reg[6] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] at LC_X19_Y8_N2
--operation mode is normal

MB1_ram_rom_data_reg[6] = AMPP_FUNCTION(A1L5, MB1_ram_rom_data_reg[7], LB1_q_b[6], MB1L13, VCC, MB1L50);


--MB1_ram_rom_data_reg[7] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] at LC_X19_Y8_N1
--operation mode is normal

MB1_ram_rom_data_reg[7] = AMPP_FUNCTION(A1L5, MB1L13, altera_internal_jtag, LB1_q_b[7], VCC, MB1L50);


--state.reset1 is state.reset1 at LC_X14_Y12_N0
--operation mode is normal

state.reset1_lut_out = VCC;
state.reset1 = DFFEAS(state.reset1_lut_out, GLOBAL(CLK_400HZ), !GLOBAL(RES), , , , , , );


--state.func_set is state.func_set at LC_X14_Y12_N1
--operation mode is normal

state.func_set_lut_out = state.hold & (next_command.func_set);
state.func_set = DFFEAS(state.func_set_lut_out, GLOBAL(CLK_400HZ), !GLOBAL(RES), , , , , , );


--state.reset2 is state.reset2 at LC_X14_Y12_N9
--operation mode is normal

state.reset2_lut_out = !next_command.reset2 & (state.hold);
state.reset2 = DFFEAS(state.reset2_lut_out, GLOBAL(CLK_400HZ), !GLOBAL(RES), , , , , , );


--state.reset3 is state.reset3 at LC_X14_Y12_N4
--operation mode is normal

state.reset3_lut_out = state.hold & (next_command.reset3);
state.reset3 = DFFEAS(state.reset3_lut_out, GLOBAL(CLK_400HZ), !GLOBAL(RES), , , , , , );


--A1L182 is state.display_clear~78 at LC_X14_Y12_N5
--operation mode is normal

A1L182 = !state.func_set & !state.reset3 & !state.reset2 & state.reset1;


--state.display_on is state.display_on at LC_X14_Y11_N7