box.cbx.xml

用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。

<?xml version="1.0" ?>
<LOG_ROOT>
	<PROJECT NAME="BOX">
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|lpm_mux:Mux_rtl_6" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_rom_sr:crc_rom_sr|lpm_mux:Mux_rtl_3" CBX_FILE_NAME="mux_8ec.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_rom_sr:crc_rom_sr|lpm_mux:Mux_rtl_2" CBX_FILE_NAME="mux_8ec.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_rom_sr:crc_rom_sr|lpm_mux:Mux_rtl_1" CBX_FILE_NAME="mux_8ec.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_rom_sr:crc_rom_sr|lpm_mux:Mux_rtl_4" CBX_FILE_NAME="mux_8ec.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|lpm_add_sub:add_rtl_2" CBX_FILE_NAME="add_sub_5rh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|lpm_add_sub:add_rtl_2" CBX_FILE_NAME="add_sub_5rh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component" CBX_FILE_NAME="altsyncram_dpu.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter" CBX_FILE_NAME="cntr_tia.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_add_sub:add_rtl_1" CBX_FILE_NAME="add_sub_4rh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare" CBX_FILE_NAME="cmpr_fnh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_add_sub:add_rtl_0" CBX_FILE_NAME="add_sub_8rh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|lpm_add_sub:add_rtl_1" CBX_FILE_NAME="add_sub_8rh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|lpm_add_sub:add_rtl_0" CBX_FILE_NAME="add_sub_ish.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[0]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[3]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder" CBX_FILE_NAME="decode_9ie.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[1]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[4]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[2]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[5]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_rom_sr:crc_rom_sr|lpm_add_sub:add_rtl_0" CBX_FILE_NAME="add_sub_4rh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|lpm_mux:IR_MUX_OUT[6]" CBX_FILE_NAME="mux_ecc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter" CBX_FILE_NAME="cntr_0id.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter" CBX_FILE_NAME="cntr_vcc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter" CBX_FILE_NAME="cntr_mbb.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|lpm_mux:Mux_rtl_4" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|lpm_mux:Mux_rtl_5" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|lpm_mux:Mux_rtl_6" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram" CBX_FILE_NAME="altsyncram_tjb2.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|lpm_mux:Mux_rtl_3" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|lpm_mux:Mux_rtl_3" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|sld_signaltap:BOX|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter" CBX_FILE_NAME="cntr_ulb.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|lpm_mux:Mux_rtl_4" CBX_FILE_NAME="mux_qfc.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|BOX|allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|lpm_mux:Mux_rtl_5" CBX_FILE_NAME="mux_qfc.tdf"/>
	</PROJECT>
</LOG_ROOT>