box.map.qmsg

用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version " "Info: Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jun 24 23:08:35 2007 " "Info: Processing started: Sun Jun 24 23:08:35 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off BOX -c BOX " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off BOX -c BOX" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "PLLU.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file PLLU.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pllu-SYN " "Info: Found design unit 1: pllu-SYN" {  } { { "PLLU.vhd" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/PLLU.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 PLLU " "Info: Found entity 1: PLLU" {  } { { "PLLU.vhd" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/PLLU.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "BOX.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file BOX.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 BOX-DACC " "Info: Found design unit 1: BOX-DACC" {  } { { "BOX.vhd" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/BOX.vhd" 16 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 BOX " "Info: Found entity 1: BOX" {  } { { "BOX.vhd" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/BOX.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "allwave.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file allwave.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 allwave-SYN " "Info: Found design unit 1: allwave-SYN" {  } { { "allwave.vhd" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/allwave.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 allwave " "Info: Found entity 1: allwave" {  } { { "allwave.vhd" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/allwave.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "BOX " "Info: Elaborating entity \"BOX\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "allwave allwave:u1 " "Info: Elaborating entity \"allwave\" for hierarchy \"allwave:u1\"" {  } { { "BOX.vhd" "u1" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/BOX.vhd" 376 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/aa/altera/quartus51/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/aa/altera/quartus51/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram allwave:u1\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"allwave:u1\|altsyncram:altsyncram_component\"" {  } { { "allwave.vhd" "altsyncram_component" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/allwave.vhd" 80 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}