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📄 mux_ecc.tdf

📁 用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。
💻 TDF
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--lpm_mux CASCADE_CHAIN="IGNORE" DEVICE_FAMILY="Cyclone" IGNORE_CASCADE_BUFFERS="ON" LPM_SIZE=4 LPM_WIDTH=1 LPM_WIDTHS=2 data result sel
--VERSION_BEGIN 5.1 cbx_lpm_mux 2005:12:13:16:24:06:SJ cbx_mgl 2006:01:12:16:15:18:SJ  VERSION_END


--  Copyright (C) 1991-2006 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.



--synthesis_resources = lut 2 
SUBDESIGN mux_ecc
( 
	data[3..0]	:	input;
	result[0..0]	:	output;
	sel[1..0]	:	input;
) 
VARIABLE 
	result_node[0..0]	: WIRE;
	sel_node[1..0]	: WIRE;
	w_data4w[3..0]	: WIRE;
	w_result19w	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( (((w_data4w[1..1] & sel_node[0..0]) & (! w_result19w)) # (w_result19w & (w_data4w[3..3] # (! sel_node[0..0])))));
	sel_node[] = ( sel[1..0]);
	w_data4w[] = ( data[3..0]);
	w_result19w = (((w_data4w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data4w[2..2])));
END;
--VALID FILE

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