box.map.rpt

用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。

Analysis & Synthesis report for BOX
Sun Jun 24 23:08:51 2007
Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. Analysis & Synthesis RAM Summary
  8. State Machine - |BOX|state
  9. State Machine - |BOX|next_command
 10. General Register Statistics
 11. Inverted Register Statistics
 12. Multiplexer Restructuring Statistics (Restructuring Performed)
 13. Source assignments for allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|altsyncram_sfa2:altsyncram1
 14. Source assignments for allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr
 15. Source assignments for sld_signaltap:BOX
 16. Source assignments for sld_signaltap:BOX|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_tjb2:auto_generated
 17. Source assignments for sld_signaltap:BOX|sld_rom_sr:crc_rom_sr
 18. Source assignments for sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG
 19. Parameter Settings for User Entity Instance: allwave:u1|altsyncram:altsyncram_component
 20. Parameter Settings for User Entity Instance: allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2
 21. Parameter Settings for User Entity Instance: PLLU:u2|altpll:altpll_component
 22. Parameter Settings for Inferred Entity Instance: sld_signaltap:BOX
 23. Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst
 24. SignalTap II Logic Analyzer Settings
 25. In-System Memory Content Editor Settings
 26. Analysis & Synthesis Equations
 27. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-----------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                ;
+-----------------------------+-----------------------------------------------+
; Analysis & Synthesis Status ; Successful - Sun Jun 24 23:08:51 2007         ;
; Quartus II Version          ; 5.1 Build 216 03/06/2006 SP 2 SJ Full Version ;
; Revision Name               ; BOX                                           ;
; Top-level Entity Name       ; BOX                                           ;
; Family                      ; Cyclone                                       ;
; Total logic elements        ; 622                                           ;