bcd2.hier_info

verilogHDL 入门的小程序

|BCD2
data_in[0] => LessThan~0.IN8
data_in[0] => data_out~7.DATAB
data_in[1] => LessThan~0.IN7
data_in[1] => add~0.IN6
data_in[1] => data_out~2.DATAB
data_in[2] => LessThan~0.IN6
data_in[2] => add~0.IN5
data_in[2] => data_out~1.DATAB
data_in[3] => LessThan~0.IN5
data_in[3] => add~0.IN4
data_in[3] => data_out~0.DATAB
EN => data_out~3.OUTPUTSELECT
EN => data_out~4.OUTPUTSELECT
EN => data_out~5.OUTPUTSELECT
EN => data_out~6.OUTPUTSELECT
EN => data_out~7.OUTPUTSELECT
data_out[0] <= data_out~7.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= data_out~6.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= data_out~5.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= data_out~4.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= data_out~3.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= <GND>
data_out[6] <= <GND>
data_out[7] <= <GND>