mask.v

Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考.

// Mask.v
module Mask_Block (clk_in, mask, clk_out);
input clk_in, mask;
output clk_out;

assign clk_out = clk_in & mask;

endmodule