mobile_sdram.hier_info

cpld 控制 8-32M sdram 控制器 maxII epm570实现。

|mobile_sdram
sd_clk <= clk~0.DB_MAX_OUTPUT_PORT_TYPE
sd_cke <= sd_cke~reg0.DB_MAX_OUTPUT_PORT_TYPE
sd_csn <= sd_csn~reg0.DB_MAX_OUTPUT_PORT_TYPE
sd_casn <= sd_casn~reg0.DB_MAX_OUTPUT_PORT_TYPE
sd_rasn <= sd_rasn~reg0.DB_MAX_OUTPUT_PORT_TYPE
sd_wen <= sd_wen~reg0.DB_MAX_OUTPUT_PORT_TYPE
ldqm <= <GND>
udqm <= <GND>
sd_ba[0] <= addr_gen:address.ba
sd_ba[1] <= addr_gen:address.ba
sd_a[0] <= addr_gen:address.a
sd_a[1] <= addr_gen:address.a
sd_a[2] <= addr_gen:address.a
sd_a[3] <= addr_gen:address.a
sd_a[4] <= addr_gen:address.a
sd_a[5] <= addr_gen:address.a
sd_a[6] <= addr_gen:address.a
sd_a[7] <= addr_gen:address.a
sd_a[8] <= addr_gen:address.a
sd_a[9] <= addr_gen:address.a
sd_a[10] <= addr_gen:address.a
sd_a[11] <= addr_gen:address.a
sd_a[12] <= addr_gen:address.a
sd_data[0] <= buffer16[0]
sd_data[1] <= buffer16[1]
sd_data[2] <= buffer16[2]
sd_data[3] <= buffer16[3]
sd_data[4] <= buffer16[4]
sd_data[5] <= buffer16[5]
sd_data[6] <= buffer16[6]
sd_data[7] <= buffer16[7]
sd_data[8] <= buffer16[8]
sd_data[9] <= buffer16[9]
sd_data[10] <= buffer16[10]
sd_data[11] <= buffer16[11]
sd_data[12] <= buffer16[12]
sd_data[13] <= buffer16[13]
sd_data[14] <= buffer16[14]
sd_data[15] <= buffer16[15]
clk => clk~0.IN4
rst => sd_csn~reg0.ACLR
rst => sd_casn~reg0.PRESET
rst => sd_rasn~reg0.PRESET
rst => sd_wen~reg0.PRESET
rst => nxt_state[4].ACLR
rst => pr_state~5.OUTPUTSELECT
rst => pr_state~6.OUTPUTSELECT
rst => pr_state~7.OUTPUTSELECT
rst => pr_state~8.OUTPUTSELECT
rst => pr_state~9.OUTPUTSELECT
rst => nxt_state[3].ACLR
rst => nxt_state[2].ACLR
rst => nxt_state[1].ACLR
rst => nxt_state[0].ACLR
rst => read_cnt_en~0.OUTPUTSELECT
rst => write_cnt_en~0.OUTPUTSELECT
rst => cas_rst~1.OUTPUTSELECT
rst => read_rst~0.OUTPUTSELECT
rst => cas_cnt_en~0.OUTPUTSELECT
rst => write_rst~0.OUTPUTSELECT
rst => sd_cke~reg0.PRESET
rst => rw.ENA
rst => fsm_cke.ENA
rst => fsm_csn.ENA
rst => fsm_casn.ENA
rst => fsm_rasn.ENA
rst => fsm_wen.ENA
cmd[0] => Equal2.IN3
cmd[0] => Equal3.IN3
cmd[0] => Equal4.IN1
cmd[0] => Equal5.IN3
cmd[0] => Equal6.IN3
cmd[0] => Equal7.IN0
cmd[0] => Equal8.IN3
cmd[0] => Equal9.IN1
cmd[0] => Equal11.IN2
cmd[0] => Equal12.IN3
cmd[1] => Equal2.IN2
cmd[1] => Equal3.IN2
cmd[1] => Equal4.IN3
cmd[1] => Equal5.IN2
cmd[1] => Equal6.IN1
cmd[1] => Equal7.IN3
cmd[1] => Equal8.IN0
cmd[1] => Equal9.IN0
cmd[1] => Equal11.IN1
cmd[1] => Equal12.IN1
cmd[2] => Equal2.IN1
cmd[2] => Equal3.IN1
cmd[2] => Equal4.IN0
cmd[2] => Equal5.IN0
cmd[2] => Equal6.IN0
cmd[2] => Equal7.IN2
cmd[2] => Equal8.IN2
cmd[2] => Equal9.IN3
cmd[2] => Equal11.IN3
cmd[2] => Equal12.IN2
cmd[3] => Equal2.IN0
cmd[3] => Equal3.IN0
cmd[3] => Equal4.IN2
cmd[3] => Equal5.IN1
cmd[3] => Equal6.IN2
cmd[3] => Equal7.IN1
cmd[3] => Equal8.IN1
cmd[3] => Equal9.IN2
cmd[3] => Equal11.IN0
cmd[3] => Equal12.IN0
data[0] <= buf16[0]
data[1] <= buf16[1]
data[2] <= buf16[2]
data[3] <= buf16[3]
data[4] <= buf16[4]
data[5] <= buf16[5]
data[6] <= buf16[6]
data[7] <= buf16[7]
data[8] <= buf16[8]
data[9] <= buf16[9]
data[10] <= buf16[10]
data[11] <= buf16[11]
data[12] <= buf16[12]
data[13] <= buf16[13]
data[14] <= buf16[14]
data[15] <= buf16[15]
addr[0] => addr[0]~23.IN1
addr[1] => addr[1]~22.IN1
addr[2] => addr[2]~21.IN1
addr[3] => addr[3]~20.IN1
addr[4] => addr[4]~19.IN1
addr[5] => addr[5]~18.IN1
addr[6] => addr[6]~17.IN1
addr[7] => addr[7]~16.IN1
addr[8] => addr[8]~15.IN1
addr[9] => addr[9]~14.IN1
addr[10] => addr[10]~13.IN1
addr[11] => addr[11]~12.IN1
addr[12] => addr[12]~11.IN1
addr[13] => addr[13]~10.IN1
addr[14] => addr[14]~9.IN1
addr[15] => addr[15]~8.IN1
addr[16] => addr[16]~7.IN1
addr[17] => addr[17]~6.IN1
addr[18] => addr[18]~5.IN1
addr[19] => addr[19]~4.IN1
addr[20] => addr[20]~3.IN1
addr[21] => addr[21]~2.IN1
addr[22] => addr[22]~1.IN1
addr[23] => addr[23]~0.IN1


|mobile_sdram|addr_gen:address
clk => ba[0]~reg0.CLK
clk => a[12]~reg0.CLK
clk => a[11]~reg0.CLK
clk => a[10]~reg0.CLK
clk => a[9]~reg0.CLK
clk => a[8]~reg0.CLK
clk => a[7]~reg0.CLK
clk => a[6]~reg0.CLK
clk => a[5]~reg0.CLK
clk => a[4]~reg0.CLK
clk => a[3]~reg0.CLK
clk => a[2]~reg0.CLK
clk => a[1]~reg0.CLK
clk => a[0]~reg0.CLK
clk => ba[1]~reg0.CLK
addr[0] => a~25.DATAB
addr[0] => a~38.DATAB
addr[1] => a~24.DATAB
addr[1] => a~37.DATAB
addr[2] => a~23.DATAB
addr[2] => a~36.DATAB
addr[3] => a~22.DATAB
addr[3] => a~35.DATAB
addr[4] => a~21.DATAB
addr[4] => a~34.DATAB
addr[5] => a~20.DATAB
addr[5] => a~33.DATAB
addr[6] => a~19.DATAB
addr[6] => a~32.DATAB
addr[7] => a~18.DATAB
addr[7] => a~31.DATAB
addr[8] => a~17.DATAB
addr[8] => a~30.DATAB
addr[9] => a~16.DATAB
addr[9] => a~29.DATAB
addr[10] => a~15.DATAB
addr[10] => a~28.DATAB
addr[11] => a~14.DATAB
addr[11] => a~27.DATAB
addr[12] => a~13.DATAB
addr[12] => a~26.DATAB
addr[13] => a~12.DATAB
addr[14] => a~11.DATAB
addr[15] => a~10.DATAB
addr[16] => a~9.DATAB
addr[17] => a~8.DATAB
addr[18] => a~7.DATAB
addr[19] => a~6.DATAB
addr[20] => a~5.DATAB
addr[21] => a~4.DATAB
addr[22] => ba~1.DATAB
addr[22] => ba~3.DATAB
addr[22] => ba~5.DATAB
addr[23] => ba~0.DATAB
addr[23] => ba~2.DATAB
addr[23] => ba~4.DATAB
pr_state[0] => Equal0.IN2
pr_state[0] => Equal1.IN4
pr_state[0] => Equal2.IN3
pr_state[0] => Equal3.IN4
pr_state[0] => Equal4.IN3
pr_state[1] => Equal0.IN4
pr_state[1] => Equal1.IN3
pr_state[1] => Equal2.IN2
pr_state[1] => Equal3.IN3
pr_state[1] => Equal4.IN2
pr_state[2] => Equal0.IN1
pr_state[2] => Equal1.IN2
pr_state[2] => Equal2.IN1
pr_state[2] => Equal3.IN2
pr_state[2] => Equal4.IN4
pr_state[3] => Equal0.IN3
pr_state[3] => Equal1.IN1
pr_state[3] => Equal2.IN0
pr_state[3] => Equal3.IN1
pr_state[3] => Equal4.IN1
pr_state[4] => Equal0.IN0
pr_state[4] => Equal1.IN0
pr_state[4] => Equal2.IN4
pr_state[4] => Equal3.IN0
pr_state[4] => Equal4.IN0
ba[0] <= ba[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ba[1] <= ba[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[0] <= a[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[1] <= a[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[2] <= a[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[3] <= a[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[4] <= a[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[5] <= a[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[6] <= a[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[7] <= a[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[8] <= a[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[9] <= a[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[10] <= a[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[11] <= a[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
a[12] <= a[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|mobile_sdram|upcount_2:cas_cntr
clk => count[0]~reg0.CLK
clk => count[1]~reg0.CLK
reset => count[0]~reg0.ACLR
reset => count[1]~reg0.ACLR
count_en => count[0]~reg0.ENA
count_en => count[1]~reg0.ENA
count[0] <= count[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[1] <= count[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|mobile_sdram|upcount_4:read_cntr
clk => count[2]~reg0.CLK
clk => count[1]~reg0.CLK
clk => count[0]~reg0.CLK
clk => count[3]~reg0.CLK
reset => count[2]~reg0.ACLR
reset => count[1]~reg0.ACLR
reset => count[0]~reg0.ACLR
reset => count[3]~reg0.ACLR
count_en => count[2]~reg0.ENA
count_en => count[1]~reg0.ENA
count_en => count[0]~reg0.ENA
count_en => count[3]~reg0.ENA
count[0] <= count[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[1] <= count[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[2] <= count[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[3] <= count[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|mobile_sdram|upcount_4:write_cntr
clk => count[2]~reg0.CLK
clk => count[1]~reg0.CLK
clk => count[0]~reg0.CLK
clk => count[3]~reg0.CLK
reset => count[2]~reg0.ACLR
reset => count[1]~reg0.ACLR
reset => count[0]~reg0.ACLR
reset => count[3]~reg0.ACLR
count_en => count[2]~reg0.ENA
count_en => count[1]~reg0.ENA
count_en => count[0]~reg0.ENA
count_en => count[3]~reg0.ENA
count[0] <= count[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[1] <= count[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[2] <= count[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[3] <= count[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE