d_agc.tan.qmsg

FPGA数字AGC(帮同学做的毕业设计)

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "3 " "Warning: Found 3 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "inst3 " "Info: Detected ripple clock \"inst3\" as buffer" {  } { { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 -112 -48 144 "inst3" "" } } } } { "d:/software/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/software/quartus60/win/Assignment Editor.qase" 1 { { 0 "inst3" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "inst2 " "Info: Detected ripple clock \"inst2\" as buffer" {  } { { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 24 88 144 "inst2" "" } } } } { "d:/software/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/software/quartus60/win/Assignment Editor.qase" 1 { { 0 "inst2" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "inst1 " "Info: Detected ripple clock \"inst1\" as buffer" {  } { { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 160 224 144 "inst1" "" } } } } { "d:/software/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/software/quartus60/win/Assignment Editor.qase" 1 { { 0 "inst1" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "sys_clock register IIR_Filter_2:inst\|Samples_out\[1\]\[3\] register IIR_Filter_2:inst\|Samples_out\[1\]\[15\] 80.43 MHz 12.433 ns Internal " "Info: Clock \"sys_clock\" has Internal fmax of 80.43 MHz between source register \"IIR_Filter_2:inst\|Samples_out\[1\]\[3\]\" and destination register \"IIR_Filter_2:inst\|Samples_out\[1\]\[15\]\" (period= 12.433 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.123 ns + Longest register register " "Info: + Longest register to register delay is 12.123 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns IIR_Filter_2:inst\|Samples_out\[1\]\[3\] 1 REG LC_X57_Y49_N9 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X57_Y49_N9; Fanout = 7; REG Node = 'IIR_Filter_2:inst\|Samples_out\[1\]\[3\]'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "" { IIR_Filter_2:inst|Samples_out[1][3] } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.828 ns) + CELL(0.621 ns) 1.449 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|romout\[0\]\[6\]~1597 2 COMB LC_X57_Y49_N4 3 " "Info: 2: + IC(0.828 ns) + CELL(0.621 ns) = 1.449 ns; Loc. = LC_X57_Y49_N4; Fanout = 3; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|romout\[0\]\[6\]~1597'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.449 ns" { IIR_Filter_2:inst|Samples_out[1][3] IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|romout[0][6]~1597 } "NODE_NAME" } } { "multcore.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/multcore.tdf" 205 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.728 ns) + CELL(0.461 ns) 2.638 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~79COUT1_94 3 COMB LC_X58_Y49_N1 2 " "Info: 3: + IC(0.728 ns) + CELL(0.461 ns) = 2.638 ns; Loc. = LC_X58_Y49_N1; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~79COUT1_94'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.189 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|romout[0][6]~1597 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79COUT1_94 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.083 ns) 2.721 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~77COUT1_95 4 COMB LC_X58_Y49_N2 2 " "Info: 4: + IC(0.000 ns) + CELL(0.083 ns) = 2.721 ns; Loc. = LC_X58_Y49_N2; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~77COUT1_95'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.083 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79COUT1_94 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_95 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.083 ns) 2.804 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~75COUT1 5 COMB LC_X58_Y49_N3 2 " "Info: 5: + IC(0.000 ns) + CELL(0.083 ns) = 2.804 ns; Loc. = LC_X58_Y49_N3; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~75COUT1'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.083 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_95 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75COUT1 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.607 ns) 3.411 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~90 6 COMB LC_X58_Y49_N4 2 " "Info: 6: + IC(0.000 ns) + CELL(0.607 ns) = 3.411 ns; Loc. = LC_X58_Y49_N4; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~90'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.607 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75COUT1 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~90 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.133 ns) + CELL(0.622 ns) 5.166 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|mpar_add:sub_par_add\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~131 7 COMB LC_X62_Y49_N4 6 " "Info: 7: + IC(1.133 ns) + CELL(0.622 ns) = 5.166 ns; Loc. = LC_X62_Y49_N4; Fanout = 6; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|mpar_add:sub_par_add\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~131'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.755 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~90 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.638 ns) 5.804 ns IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|mpar_add:sub_par_add\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~128 8 COMB LC_X62_Y49_N5 3 " "Info: 8: + IC(0.000 ns) + CELL(0.638 ns) = 5.804 ns; Loc. = LC_X62_Y49_N5; Fanout = 3; COMB Node = 'IIR_Filter_2:inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\|mpar_add:sub_par_add\|lpm_add_sub:adder\[0\]\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[0\]~128'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.638 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~128 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/software/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.739 ns) + CELL(0.610 ns) 7.153 ns IIR_Filter_2:inst\|Data_feedback\[10\]~57COUT1_73 9 COMB LC_X61_Y49_N6 2 " "Info: 9: + IC(0.739 ns) + CELL(0.610 ns) = 7.153 ns; Loc. = LC_X61_Y49_N6; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|Data_feedback\[10\]~57COUT1_73'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.349 ns" { IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~128 IIR_Filter_2:inst|Data_feedback[10]~57COUT1_73 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.083 ns) 7.236 ns IIR_Filter_2:inst\|Data_feedback\[11\]~55COUT1_74 10 COMB LC_X61_Y49_N7 2 " "Info: 10: + IC(0.000 ns) + CELL(0.083 ns) = 7.236 ns; Loc. = LC_X61_Y49_N7; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|Data_feedback\[11\]~55COUT1_74'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.083 ns" { IIR_Filter_2:inst|Data_feedback[10]~57COUT1_73 IIR_Filter_2:inst|Data_feedback[11]~55COUT1_74 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.083 ns) 7.319 ns IIR_Filter_2:inst\|Data_feedback\[12\]~53COUT1_75 11 COMB LC_X61_Y49_N8 2 " "Info: 11: + IC(0.000 ns) + CELL(0.083 ns) = 7.319 ns; Loc. = LC_X61_Y49_N8; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|Data_feedback\[12\]~53COUT1_75'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.083 ns" { IIR_Filter_2:inst|Data_feedback[11]~55COUT1_74 IIR_Filter_2:inst|Data_feedback[12]~53COUT1_75 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.607 ns) 7.926 ns IIR_Filter_2:inst\|Data_feedback\[13\]~50 12 COMB LC_X61_Y49_N9 3 " "Info: 12: + IC(0.000 ns) + CELL(0.607 ns) = 7.926 ns; Loc. = LC_X61_Y49_N9; Fanout = 3; COMB Node = 'IIR_Filter_2:inst\|Data_feedback\[13\]~50'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.607 ns" { IIR_Filter_2:inst|Data_feedback[12]~53COUT1_75 IIR_Filter_2:inst|Data_feedback[13]~50 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.407 ns) + CELL(0.610 ns) 9.943 ns IIR_Filter_2:inst\|Add3~517COUT1_552 13 COMB LC_X60_Y48_N6 2 " "Info: 13: + IC(1.407 ns) + CELL(0.610 ns) = 9.943 ns; Loc. = LC_X60_Y48_N6; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|Add3~517COUT1_552'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "2.017 ns" { IIR_Filter_2:inst|Data_feedback[13]~50 IIR_Filter_2:inst|Add3~517COUT1_552 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.083 ns) 10.026 ns IIR_Filter_2:inst\|Add3~515COUT1_553 14 COMB LC_X60_Y48_N7 2 " "Info: 14: + IC(0.000 ns) + CELL(0.083 ns) = 10.026 ns; Loc. = LC_X60_Y48_N7; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|Add3~515COUT1_553'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.083 ns" { IIR_Filter_2:inst|Add3~517COUT1_552 IIR_Filter_2:inst|Add3~515COUT1_553 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.607 ns) 10.633 ns IIR_Filter_2:inst\|Add3~512 15 COMB LC_X60_Y48_N8 2 " "Info: 15: + IC(0.000 ns) + CELL(0.607 ns) = 10.633 ns; Loc. = LC_X60_Y48_N8; Fanout = 2; COMB Node = 'IIR_Filter_2:inst\|Add3~512'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "0.607 ns" { IIR_Filter_2:inst|Add3~515COUT1_553 IIR_Filter_2:inst|Add3~512 } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.173 ns) + CELL(0.317 ns) 12.123 ns IIR_Filter_2:inst\|Samples_out\[1\]\[15\] 16 REG LC_X63_Y48_N3 7 " "Info: 16: + IC(1.173 ns) + CELL(0.317 ns) = 12.123 ns; Loc. = LC_X63_Y48_N3; Fanout = 7; REG Node = 'IIR_Filter_2:inst\|Samples_out\[1\]\[15\]'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.490 ns" { IIR_Filter_2:inst|Add3~512 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.115 ns ( 50.44 % ) " "Info: Total cell delay = 6.115 ns ( 50.44 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.008 ns ( 49.56 % ) " "Info: Total interconnect delay = 6.008 ns ( 49.56 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.123 ns" { IIR_Filter_2:inst|Samples_out[1][3] IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|romout[0][6]~1597 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79COUT1_94 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_95 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75COUT1 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~90 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~128 IIR_Filter_2:inst|Data_feedback[10]~57COUT1_73 IIR_Filter_2:inst|Data_feedback[11]~55COUT1_74 IIR_Filter_2:inst|Data_feedback[12]~53COUT1_75 IIR_Filter_2:inst|Data_feedback[13]~50 IIR_Filter_2:inst|Add3~517COUT1_552 IIR_Filter_2:inst|Add3~515COUT1_553 IIR_Filter_2:inst|Add3~512 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.123 ns" { IIR_Filter_2:inst|Samples_out[1][3] IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|romout[0][6]~1597 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79COUT1_94 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_95 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75COUT1 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~90 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~128 IIR_Filter_2:inst|Data_feedback[10]~57COUT1_73 IIR_Filter_2:inst|Data_feedback[11]~55COUT1_74 IIR_Filter_2:inst|Data_feedback[12]~53COUT1_75 IIR_Filter_2:inst|Data_feedback[13]~50 IIR_Filter_2:inst|Add3~517COUT1_552 IIR_Filter_2:inst|Add3~515COUT1_553 IIR_Filter_2:inst|Add3~512 IIR_Filter_2:inst|Samples_out[1][15] } { 0.000ns 0.828ns 0.728ns 0.000ns 0.000ns 0.000ns 1.133ns 0.000ns 0.739ns 0.000ns 0.000ns 0.000ns 1.407ns 0.000ns 0.000ns 1.173ns } { 0.000ns 0.621ns 0.461ns 0.083ns 0.083ns 0.607ns 0.622ns 0.638ns 0.610ns 0.083ns 0.083ns 0.607ns 0.610ns 0.083ns 0.607ns 0.317ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.059 ns - Smallest " "Info: - Smallest clock skew is -0.059 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_clock destination 12.772 ns + Shortest register " "Info: + Shortest clock path from clock \"sys_clock\" to destination register is 12.772 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.309 ns) 1.309 ns sys_clock 1 CLK PIN_P25 1 " "Info: 1: + IC(0.000 ns) + CELL(1.309 ns) = 1.309 ns; Loc. = PIN_P25; Fanout = 1; CLK Node = 'sys_clock'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "" { sys_clock } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 160 -352 -184 176 "sys_clock" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.909 ns) + CELL(0.995 ns) 3.213 ns inst3 2 REG LC_X1_Y35_N4 2 " "Info: 2: + IC(0.909 ns) + CELL(0.995 ns) = 3.213 ns; Loc. = LC_X1_Y35_N4; Fanout = 2; REG Node = 'inst3'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.904 ns" { sys_clock inst3 } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 -112 -48 144 "inst3" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.586 ns) + CELL(0.995 ns) 4.794 ns inst2 3 REG LC_X1_Y35_N2 2 " "Info: 3: + IC(0.586 ns) + CELL(0.995 ns) = 4.794 ns; Loc. = LC_X1_Y35_N2; Fanout = 2; REG Node = 'inst2'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.581 ns" { inst3 inst2 } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 24 88 144 "inst2" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.514 ns) + CELL(0.995 ns) 7.303 ns inst1 4 REG LC_X1_Y33_N2 33 " "Info: 4: + IC(1.514 ns) + CELL(0.995 ns) = 7.303 ns; Loc. = LC_X1_Y33_N2; Fanout = 33; REG Node = 'inst1'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "2.509 ns" { inst2 inst1 } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 160 224 144 "inst1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.712 ns) + CELL(0.757 ns) 12.772 ns IIR_Filter_2:inst\|Samples_out\[1\]\[15\] 5 REG LC_X63_Y48_N3 7 " "Info: 5: + IC(4.712 ns) + CELL(0.757 ns) = 12.772 ns; Loc. = LC_X63_Y48_N3; Fanout = 7; REG Node = 'IIR_Filter_2:inst\|Samples_out\[1\]\[15\]'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "5.469 ns" { inst1 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.051 ns ( 39.55 % ) " "Info: Total cell delay = 5.051 ns ( 39.55 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.721 ns ( 60.45 % ) " "Info: Total interconnect delay = 7.721 ns ( 60.45 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.772 ns" { sys_clock inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.772 ns" { sys_clock sys_clock~out0 inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][15] } { 0.000ns 0.000ns 0.909ns 0.586ns 1.514ns 4.712ns } { 0.000ns 1.309ns 0.995ns 0.995ns 0.995ns 0.757ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_clock source 12.831 ns - Longest register " "Info: - Longest clock path from clock \"sys_clock\" to source register is 12.831 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.309 ns) 1.309 ns sys_clock 1 CLK PIN_P25 1 " "Info: 1: + IC(0.000 ns) + CELL(1.309 ns) = 1.309 ns; Loc. = PIN_P25; Fanout = 1; CLK Node = 'sys_clock'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "" { sys_clock } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 160 -352 -184 176 "sys_clock" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.909 ns) + CELL(0.995 ns) 3.213 ns inst3 2 REG LC_X1_Y35_N4 2 " "Info: 2: + IC(0.909 ns) + CELL(0.995 ns) = 3.213 ns; Loc. = LC_X1_Y35_N4; Fanout = 2; REG Node = 'inst3'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.904 ns" { sys_clock inst3 } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 -112 -48 144 "inst3" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.586 ns) + CELL(0.995 ns) 4.794 ns inst2 3 REG LC_X1_Y35_N2 2 " "Info: 3: + IC(0.586 ns) + CELL(0.995 ns) = 4.794 ns; Loc. = LC_X1_Y35_N2; Fanout = 2; REG Node = 'inst2'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "1.581 ns" { inst3 inst2 } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 24 88 144 "inst2" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.514 ns) + CELL(0.995 ns) 7.303 ns inst1 4 REG LC_X1_Y33_N2 33 " "Info: 4: + IC(1.514 ns) + CELL(0.995 ns) = 7.303 ns; Loc. = LC_X1_Y33_N2; Fanout = 33; REG Node = 'inst1'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "2.509 ns" { inst2 inst1 } "NODE_NAME" } } { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 64 160 224 144 "inst1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.771 ns) + CELL(0.757 ns) 12.831 ns IIR_Filter_2:inst\|Samples_out\[1\]\[3\] 5 REG LC_X57_Y49_N9 7 " "Info: 5: + IC(4.771 ns) + CELL(0.757 ns) = 12.831 ns; Loc. = LC_X57_Y49_N9; Fanout = 7; REG Node = 'IIR_Filter_2:inst\|Samples_out\[1\]\[3\]'" {  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "5.528 ns" { inst1 IIR_Filter_2:inst|Samples_out[1][3] } "NODE_NAME" } } { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.051 ns ( 39.37 % ) " "Info: Total cell delay = 5.051 ns ( 39.37 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.780 ns ( 60.63 % ) " "Info: Total interconnect delay = 7.780 ns ( 60.63 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.831 ns" { sys_clock inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][3] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.831 ns" { sys_clock sys_clock~out0 inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][3] } { 0.000ns 0.000ns 0.909ns 0.586ns 1.514ns 4.771ns } { 0.000ns 1.309ns 0.995ns 0.995ns 0.995ns 0.757ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.772 ns" { sys_clock inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.772 ns" { sys_clock sys_clock~out0 inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][15] } { 0.000ns 0.000ns 0.909ns 0.586ns 1.514ns 4.712ns } { 0.000ns 1.309ns 0.995ns 0.995ns 0.995ns 0.757ns } } } { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.831 ns" { sys_clock inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][3] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.831 ns" { sys_clock sys_clock~out0 inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][3] } { 0.000ns 0.000ns 0.909ns 0.586ns 1.514ns 4.771ns } { 0.000ns 1.309ns 0.995ns 0.995ns 0.995ns 0.757ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.238 ns + " "Info: + Micro clock to output delay of source is 0.238 ns" {  } { { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 34 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.013 ns + " "Info: + Micro setup delay of destination is 0.013 ns" {  } { { "IIR_Filter_2.v" "" { Text "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/IIR_Filter_2.v" 34 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.123 ns" { IIR_Filter_2:inst|Samples_out[1][3] IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|romout[0][6]~1597 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79COUT1_94 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_95 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75COUT1 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~90 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~128 IIR_Filter_2:inst|Data_feedback[10]~57COUT1_73 IIR_Filter_2:inst|Data_feedback[11]~55COUT1_74 IIR_Filter_2:inst|Data_feedback[12]~53COUT1_75 IIR_Filter_2:inst|Data_feedback[13]~50 IIR_Filter_2:inst|Add3~517COUT1_552 IIR_Filter_2:inst|Add3~515COUT1_553 IIR_Filter_2:inst|Add3~512 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.123 ns" { IIR_Filter_2:inst|Samples_out[1][3] IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|romout[0][6]~1597 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79COUT1_94 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_95 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75COUT1 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~90 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131 IIR_Filter_2:inst|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~128 IIR_Filter_2:inst|Data_feedback[10]~57COUT1_73 IIR_Filter_2:inst|Data_feedback[11]~55COUT1_74 IIR_Filter_2:inst|Data_feedback[12]~53COUT1_75 IIR_Filter_2:inst|Data_feedback[13]~50 IIR_Filter_2:inst|Add3~517COUT1_552 IIR_Filter_2:inst|Add3~515COUT1_553 IIR_Filter_2:inst|Add3~512 IIR_Filter_2:inst|Samples_out[1][15] } { 0.000ns 0.828ns 0.728ns 0.000ns 0.000ns 0.000ns 1.133ns 0.000ns 0.739ns 0.000ns 0.000ns 0.000ns 1.407ns 0.000ns 0.000ns 1.173ns } { 0.000ns 0.621ns 0.461ns 0.083ns 0.083ns 0.607ns 0.622ns 0.638ns 0.610ns 0.083ns 0.083ns 0.607ns 0.610ns 0.083ns 0.607ns 0.317ns } } } { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.772 ns" { sys_clock inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][15] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.772 ns" { sys_clock sys_clock~out0 inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][15] } { 0.000ns 0.000ns 0.909ns 0.586ns 1.514ns 4.712ns } { 0.000ns 1.309ns 0.995ns 0.995ns 0.995ns 0.757ns } } } { "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/quartus60/win/TimingClosureFloorplan.fld" "" "12.831 ns" { sys_clock inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][3] } "NODE_NAME" } } { "d:/software/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/software/quartus60/win/Technology_Viewer.qrui" "12.831 ns" { sys_clock sys_clock~out0 inst3 inst2 inst1 IIR_Filter_2:inst|Samples_out[1][3] } { 0.000ns 0.000ns 0.909ns 0.586ns 1.514ns 4.771ns } { 0.000ns 1.309ns 0.995ns 0.995ns 0.995ns 0.757ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}