d_agc.tan.qmsg

FPGA数字AGC(帮同学做的毕业设计)

{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off D_AGC -c D_AGC --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off D_AGC -c D_AGC --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "sys_clock " "Info: Assuming node \"sys_clock\" is an undefined clock" {  } { { "D_AGC.bdf" "" { Schematic "C:/Documents and Settings/joe/桌面/梁言的毕设/D_AGC/D_AGC.bdf" { { 160 -352 -184 176 "sys_clock" "" } } } } { "d:/software/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/software/quartus60/win/Assignment Editor.qase" 1 { { 0 "sys_clock" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}