d_agc.map.summary

FPGA数字AGC(帮同学做的毕业设计)

Analysis & Synthesis Status : Successful - Tue Jun 03 11:49:25 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : D_AGC
Top-level Entity Name : D_AGC
Family : Stratix
Total logic elements : 35
Total pins : 62
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0