📄 col.dat

📁 This is an extension of sign example. You can design your own traffic sign by using Verilog. And the
💻 DAT
字号:
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32016
32736
31888
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 1024
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12072
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16384
33792
17410
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 4104
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17410
33792
16384
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12072
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12072
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10272
 9760
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 9760
10272
 9760
 4096
    0
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    0
16384
33792
17410
 9220
 4104
 2064
   32
   32
 2064
 4104
 9220
17410
33792
16384
    0
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    0
 4096
 9776
12072
 9764
 4130
   34
   34
 4130
 9764
12072
 9776
 4096
    0
    0
    0
    0
 4096
 9760
10272
 9760
 4158
   33
   33
 4158
 9760
10272
 9760
 4096
    0
    0
    0
16384
33792
17410
 9220
 4104
 2064
   32
   32
 2064
 4104
 9220
17410
33792
16384
    0
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    0
 4096
 9776
12072
 9764
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   34
   34
 4130
 9764
12072
 9776
 4096
    0
    0
    0
    0
 4096
 9760
10272
 9760
 4158
   33
   33
 4158
 9760
10272
 9760
 4096
    0
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16384
33792
17410
 9220
 4104
 2064
   32
   32
 2064
 4104
 9220
17410
33792
16384
    0
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   68
14504
32016
32736
31888
14600
  516
 1024
 2048
 4096
    0
    0
    0
    0
 4096
 9776
12072
 9764
 4130
   34
   34
 4130
 9764
12072
 9776
 4096
    0
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    0
💿 文件大小 255 K
👤 上传用户 rickie936
📂 所属分类其他
🏷️ 相关标签

#sign #extension #Verilog #example
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