rom.fit.rpt

我用VHDL写的正弦

; Weak Pull-Up Resistor                                ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                            ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                   ; Off                            ; Off                            ;
; Auto Packed Registers -- Stratix II/Cyclone II       ; Auto                           ; Auto                           ;
; Auto Delay Chains                                    ; On                             ; On                             ;
; Auto Merge PLLs                                      ; On                             ; On                             ;
; Fitter Effort                                        ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                      ; Normal                         ; Normal                         ;
; Auto Global Clock                                    ; On                             ; On                             ;
; Auto Global Register Control Signals                 ; On                             ; On                             ;
+------------------------------------------------------+--------------------------------+--------------------------------+


+-------------------------------------------------------------------------+
; Fitter Device Options                                                   ;
+----------------------------------------------+--------------------------+
; Option                                       ; Setting                  ;
+----------------------------------------------+--------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                      ;
; Enable device-wide reset (DEV_CLRn)          ; Off                      ;
; Enable device-wide output enable (DEV_OE)    ; Off                      ;
; Enable INIT_DONE output                      ; Off                      ;
; Configuration scheme                         ; Active Serial            ;
; Error detection CRC                          ; Off                      ;
; Reserve nCEO pin after configuration         ; As output driving ground ;
; Reserve all unused pins                      ; As output driving ground ;
; Base pin-out file on sameframe device        ; Off                      ;
+----------------------------------------------+--------------------------+


+------------------+
; Fitter Equations ;
+------------------+
The equations can be found in D:/rom/rom.fit.eqn.


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in D:/rom/rom.pin.


+----------------------------------------------------------------------------------------------------------------+
; Fitter Resource Usage Summary                                                                                  ;
+---------------------------------------------+------------------------------------------------------------------+
; Resource                                    ; Usage                                                            ;
+---------------------------------------------+------------------------------------------------------------------+
; Total logic elements                        ; 372 / 8,256 ( 5 % )                                              ;
;     -- Combinational with no register       ; 74                                                               ;
;     -- Register only                        ; 101                                                              ;
;     -- Combinational with a register        ; 197                                                              ;
;                                             ;                                                                  ;
; Logic element usage by number of LUT inputs ;                                                                  ;
;     -- 4 input functions                    ; 125                                                              ;
;     -- 3 input functions                    ; 53                                                               ;
;     -- <=2 input functions                  ; 93                                                               ;
;     -- Register only                        ; 101                                                              ;
;         -- Combinational cells for routing  ; 79                                                               ;
;                                             ;                                                                  ;
; Logic elements by mode                      ;                                                                  ;
;     -- normal mode                          ; 225                                                              ;
;     -- arithmetic mode                      ; 46                                                               ;
;                                             ;                                                                  ;
; Total registers                             ; 298 / 8,256 ( 4 % )                                              ;
; Total LABs                                  ; 42 / 516 ( 8 % )                                                 ;
; User inserted logic elements                ; 0                                                                ;
; Virtual pins                                ; 0                                                                ;
; I/O pins                                    ; 10 / 138 ( 7 % )                                                 ;
;     -- Clock pins                           ; 1 / 4 ( 25 % )                                                   ;
; Global signals                              ; 8                                                                ;
; M4Ks                                        ; 3 / 36 ( 8 % )                                                   ;
; Total memory bits                           ; 7,680 / 165,888 ( 5 % )                                          ;
; Total RAM block bits                        ; 13,824 / 165,888 ( 8 % )                                         ;
; Embedded Multiplier 9-bit elements          ; 0 / 36 ( 0 % )                                                   ;
; PLLs                                        ; 0 / 2 ( 0 % )                                                    ;
; Global clocks                               ; 8 / 8 ( 100 % )                                                  ;
; Maximum fan-out node                        ; altera_internal_jtag~TCKUTAPclkctrl                              ;
; Maximum fan-out                             ; 189                                                              ;
; Highest non-global fan-out signal           ; sld_signaltap:rom1|sld_ela_control:ela_control|trigger_setup_ena ;
; Highest non-global fan-out                  ; 60                                                               ;
; Total fan-out                               ; 1989                                                             ;
; Average fan-out                             ; 2.94                                                             ;
+---------------------------------------------+------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                  ;
+-------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; Name  ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Location assigned by ;
+-------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; clk   ; 23    ; 1        ; 0            ; 9            ; 0           ; 1                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; LVTTL        ; Off         ; User                 ;
; q1(0) ; 87    ; 4        ; 25           ; 0            ; 1           ; 1                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; LVTTL        ; Off         ; Fitter               ;
+-------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Pins                                                                                                                                                                                                                                                                              ;