📄 rom.fit.qmsg

📁 我用VHDL写的正弦
💻 QMSG
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{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk (placed in PIN 23 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node clk (placed in PIN 23 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "rom.vhd" "" { Text "D:/rom/rom.vhd" 6 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { clk } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { clk } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "altera_internal_jtag~TCKUTAP  " "Info: Automatically promoted node altera_internal_jtag~TCKUTAP " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TDO" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:rom1\|reset_all  " "Info: Automatically promoted node sld_signaltap:rom1\|reset_all " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 415 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "../altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" 415 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|reset_all" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|reset_all } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|reset_all } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|CLRN_SIGNAL  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|CLRN_SIGNAL " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|reset_all " "Info: Destination node sld_signaltap:rom1\|reset_all" {  } { { "../altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" 415 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|reset_all" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|reset_all } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|reset_all } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 307 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|CLRN_SIGNAL" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|CLRN_SIGNAL } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_hub:sld_hub_inst|CLRN_SIGNAL } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~439 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~439" {  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1020 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~439" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~439 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~439 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" {  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1020 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1035 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset  " "Info: Automatically promoted node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 415 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena  " "Info: Automatically promoted node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1274 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1274" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1274" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1274 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1274 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1275 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1275" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1275" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1275 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1275 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1276 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1276" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1276" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1276 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1276 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1277 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1277" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1277" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1277 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1277 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1278 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1278" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1278" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1278 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1278 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1279 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1279" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1279" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1279 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1279 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1280 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1280" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1280" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1280 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1280 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1281 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1281" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1281" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1281 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1281 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1282 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1282" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1282" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1282 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1282 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1283 " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1283" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1283" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1283 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1283 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Info: Non-global destination nodes limited to 10 nodes" {  } {  } 0 0 "Non-global destination nodes limited to %1!d! nodes" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 400 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~113 " "Info: Destination node sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~113" {  } { { "../altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" 1128 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~113" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~109 " "Info: Destination node sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~109" {  } { { "../altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" 1017 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~109" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~109 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~109 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\] " "Info: Destination node sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" {  } { { "../altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" 1154 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|IRSR_D\[2\]~444 " "Info: Destination node sld_hub:sld_hub_inst\|IRSR_D\[2\]~444" {  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 334 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|IRSR_D\[2\]~444" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|IRSR_D[2]~444 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_hub:sld_hub_inst|IRSR_D[2]~444 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~89 " "Info: Destination node sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~89" {  } { { "../altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" 1056 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~89" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~89 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~89 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~131 " "Info: Destination node sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~131" {  } { { "../altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" 1399 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~131" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~131 } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~131 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset " "Info: Destination node sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" {  } { { "../altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_acquisition_buffer.vhd" 415 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rom1\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "../altera/quartus51/libraries/megafunctions/sld_dffex.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } "" } } { "D:/rom/rom.fld" "" { Floorplan "D:/rom/rom.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0}
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