rom.asm.qmsg

我用VHDL写的正弦

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Sep 03 13:24:52 2008 " "Info: Processing started: Wed Sep 03 13:24:52 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off rom -c rom " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off rom -c rom" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Critical Warning" "WCUT_CUT_ATOM_CYCLONEII_EC_DUAL_PORT_DUAL_CLOCK_MODE_VERIFIED_SAFE" "sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a0 " "Critical Warning: Implementation of M4K memory block WYSIWYG primitive \"sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a0\" of altsyncram megafunction may not work with the current target device family. The value of the CYCLONEII_SAFE_WRITE parameter is set to VERIFIED_SAFE. Please refer to the Cyclone II FPGA Family Errata Sheet for more information on this feature." {  } { { "db/altsyncram_faf2.tdf" "" { Text "D:/rom/db/altsyncram_faf2.tdf" 44 2 0 } } { "altsyncram.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 903 3 0 } } { "../altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" 720 -1 0 } }  } 1 0 "Implementation of M4K memory block WYSIWYG primitive \"%1!s!\" of altsyncram megafunction may not work with the current target device family. The value of the CYCLONEII_SAFE_WRITE parameter is set to VERIFIED_SAFE. Please refer to the Cyclone II FPGA Family Errata Sheet for more information on this feature." 0 0}
{ "Critical Warning" "WCUT_CUT_ATOM_CYCLONEII_EC_DUAL_PORT_DUAL_CLOCK_MODE_VERIFIED_SAFE" "sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3 " "Critical Warning: Implementation of M4K memory block WYSIWYG primitive \"sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3\" of altsyncram megafunction may not work with the current target device family. The value of the CYCLONEII_SAFE_WRITE parameter is set to VERIFIED_SAFE. Please refer to the Cyclone II FPGA Family Errata Sheet for more information on this feature." {  } { { "db/altsyncram_faf2.tdf" "" { Text "D:/rom/db/altsyncram_faf2.tdf" 44 2 0 } } { "altsyncram.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 903 3 0 } } { "../altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_signaltap.vhd" 720 -1 0 } }  } 1 0 "Implementation of M4K memory block WYSIWYG primitive \"%1!s!\" of altsyncram megafunction may not work with the current target device family. The value of the CYCLONEII_SAFE_WRITE parameter is set to VERIFIED_SAFE. Please refer to the Cyclone II FPGA Family Errata Sheet for more information on this feature." 0 0}
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" {  } {  } 0 0 "Writing out detailed assembly data for power analysis" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 2 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Sep 03 13:24:54 2008 " "Info: Processing ended: Wed Sep 03 13:24:54 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}